MCP1725-1502E/MC MICROCHIP [Microchip Technology], MCP1725-1502E/MC Datasheet - Page 22

• Manufacturer Part Number: MCP1725-1502E/MC
• Description: 500 mA, Low Voltage, Low Quiescent Current LDO Regulator
• Manufacturer: MICROCHIP [Microchip Technology]

MCP1725
5.3.2
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
As you can see from the result, this application will be
operating near around a junction temperature of
100°C. The PCB layout for this application is very
important as it has a significant impact on the junction-
to-ambient thermal resistance (Rθ
package, which is very important in this application.
5.3.3
From this table, you can see the difference in maximum
allowable power dissipation between the 2x3 DFN
package and the 8-pin SOIC package. This difference
is due to the exposed metal tab on the bottom of the
DFN package. The exposed tab of the DFN package
provides a very good thermal path from the die of the
LDO to the PCB. The PCB then acts like a heatsink,
providing more area to distribute the heat generated by
the LDO.
DS22026A-page 22
2x3 DFN (76° C/W Rθ
SOIC8 (163°C/Watt Rθ
P
P
P
P
D(MAX)
D(MAX)
D(MAX)
D(MAX)
T
T
T
JUNCTION TEMPERATURE
ESTIMATE
MAXIMUM PACKAGE POWER
DISSIPATION AT 60°C AMBIENT
TEMPERATURE
J
J
J
= T
= 38.8°C + 60.0°C
= 98.8°C
JRISE
=
=
=
=
(125°C – 60°C) / 76° C/W
0.855W
(125°C – 60°C)/ 163° C/W
0.399W
JA
+ T
JA
):
):
A(MAX)
JA
) of the 2x3 DFN
5.4
C
Where:
For a delay of 300ms,
C = 333.3E-09 *.300
C = 100E-09 µF (0.1 µF)
=
I
ΔV
ΔT
C
•
C
DELAY
I
ΔT
------ -
ΔV
=
=
=
=
=
(
--------------------------------- -
140nA ΔT
Calculations (typical)
C
0.42V
C
C
140 nA typical.
time delay
C
0.42V typical
© 2006 Microchip Technology Inc.
DELAY
DELAY
DELAY
=
•
I
•
ΔT
------ -
ΔV
)
Capacitor
charging current,
threshold voltage,
=
333.3
×10
–
09
•
ΔT