AT90LS2343 ATMEL [ATMEL Corporation], AT90LS2343 Datasheet - Page 32

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AT90LS2343

Manufacturer Part Number
AT90LS2343
Description
8-Bit Microcontroller with 2K Bytes of In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheets

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EEPROM Read/Write
Access
EEPROM Address Register –
EEAR
EEPROM Data Register –
EEDR
32
AT90S/LS2323/2343
The EEPROM access registers are accessible in the I/O space.
The write access time is in the range of 2.5 - 4 ms, depending on the V
self-timing function, however, lets the user software detect when the next byte can be
written.
In order to prevent unintentional EEPROM writes, a specific write procedure must be fol-
lowed. Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed. When the EEPROM is read, the CPU is halted for four clock
cycles before the next instruction is executed.
• Bit 7 – Res: Reserved Bit
This bit is a reserved bit in the AT90S2323/2343 and will always read as zero.
• Bit 6..0 – EEAR6..0: EEPROM Address
The EEPROM Address Register (EEAR6..0) specifies the EEPROM address in the
128-byte EEPROM space. The EEPROM data bytes are addressed linearly between 0
and 127.
• Bits 7..0 – EEDR7..0: EEPROM Data
For the EEPROM write operation, the EEDR register contains the data to be written to
the EEPROM in the address given by the EEAR register. For the EEPROM read opera-
tion, the EEDR contains the data read out from the EEPROM at the address given by
EEAR.
Bit
$1E ($3E)
Read/Write
Initial Value
Bit
$1D ($3D)
Read/Write
Initial Value
MSB
R/W
R
7
0
7
0
EEAR6
R/W
R/W
6
0
6
0
EEAR5
R/W
R/W
5
0
5
0
EEAR4
R/W
R/W
4
0
4
0
EEAR3
R/W
R/W
3
0
3
0
EEAR2
R/W
R/W
2
0
2
0
EEAR1
R/W
R/W
1
0
1
0
EEAR0
LSB
R/W
R/W
CC
0
0
0
0
voltages. A
1004D–09/01
EEAR
EEDR

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