P87C52 PHILIPS [NXP Semiconductors], P87C52 Datasheet - Page 11

• Manufacturer Part Number: P87C52
• Description: 80C51 8-bit microcontrollers 16K/32K, 512 OTP, I2C, watchdog timer
• Manufacturer: PHILIPS [NXP Semiconductors]

1. Capacitive loading on Port 0 and Port 2 may cause spurious noise pulses to be superimposed on the V
2. Capacitive loading on Ports 0 and 2 may cause the V
3. Pins of ports 1, 2, and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
4. See Figures 10 through 13 for I
5. The input threshold voltage of P1.6 and P1.7 (SIO1) meets the I
Philips Semiconductors
DC ELECTRICAL CHARACTERISTICS
T
NOTES:
1999 Jul 23
amb
SYMBOL
V
V
V
V
V
V
V
V
V
V
V
I
I
I
I
I
R
C
IL
TL
IL1
IL2
CC
IL
IL1
IL2
IH
IH1
IH2
OL
OL1
OL2
OH
OH1
80C51 8-bit microcontrollers
16K/32K, 512 OTP, I
RST
IO
noise is due to external bus capacitance discharging into the port and port 2 pins when these pins make 1-to-0 transactions during bus
operations. In the worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be
desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. Under steady state
(non-transient) conditions, I
(all bits) 15 mA.
address bits are stabilizing.
maximum value when V
logic 0 while an input voltage above 3.0 V will be recognized as a logic 1.
= 0 C to +70 C (V
Input low voltage,
except EA, P1.6/SCL, P1.7/SDA
Input low voltage to EA
Input low voltage to P1.6/SCL, P1.7/SDA
Input high voltage,
except XTAL1, RST, P1.6/SCL, P1.7/SDA
Input high voltage, XTAL1, RST
Input high voltage, P1.6/SCL, P1.7/SDA
Output low voltage, ports 1, 2, 3, except
P1.6/SCL, P1.7/SDA
Output low voltage, port 0, ALE, PSEN
Output low voltage, P1.6/SCL, P1.7/SDA
Output high voltage, ports 1, 2, 3
Output high voltage, Port 0 in external bus mode,
ALE, PSEN, RST
Logical 0 input current, ports 1, 2, 3,
except P1.6/SCL, P1.7/SDA
Logical 1-to-0 transition current, ports 1, 2, 3,
except P1.6/SCL, P1.7/SDA
Input leakage current, port 0
Input leakage current, P1.6/SCL, P1.7/SDA
Power supply current:
Internal reset pull-down resistor
Pin Capacitance
Active mode @ 16 MHz
Idle mode @ 16 MHz
Power down mode
DD
= 5 V 10%), –40 C to +85 C (V
IN
is approximately 2 V.
OL
PARAMETER
must be externally limited as follows: 10 mA per port pin, port 0 total (all bits) 26 mA, ports 1, 2, and total each
1
CC
test conditions.
2
C, watchdog timer
1
5
5
OH
DD
on ALE and PSEN to momentarily fall below the 0.9V
= 5 V 10%), V
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40
–40
2
C specification, so an input voltage below 1.5 V will be recognized as a
PART TYPE
0
0
0 C to 70 C
0 C to 70 C
0 C to 70 C
0 C to 70 C
0 C to 70 C
0 C to 70 C
o
o
o
o
C to 70
C to 70
11
C to +85
C to +85
o
o
SS
C
C
o
o
=0 V
C
C
V
0 V<V
CONDITIONS
I
I
I
I
I
I
OH
0 V<Vi<6.0 V
OL
OL
OL
I
OH
V
IN
OH
OH
See Note 3
See Note 4
IN
= V
= 1.6 mA
= 3.2 mA
= 3.0 mA
= –300 A
TEST
= –800 A
= –25 A
= –60 A
= 0.45 V
CC
IL
<6.0 V
or V
1
1
1
IH
OL
0.2V
0.2V
0.7V
s of ALE and ports 1 and 3. The
0.75V
0.75V
0.7V
–0.5
–0.5
–0.5
MIN
3.0
2.4
2.4
CC
CC
CC
50
87C524/87C528
0
0
CC
CC
+0.9
+1.0
+0.1
CC
CC
specification when the
LIMITS
0.2V
0.2V
0.2V
0.2V
Product specification
V
V
V
V
CC
CC
CC
CC
MAX
0.3 V
–650
–750
0.45
0.45
CC
CC
–50
–75
300
6.0
0.4
CC
CC
25
35
50
10
10
10
5
6
+0.5
+0.5
+0.5
+0.5
–0.15
–0.35
–0.1
–0.3
UNIT
mA
mA
k
pF
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
A
A
A
A
A
A