FM1236/HM PHILIPS [NXP Semiconductors], FM1236/HM Datasheet - Page 15

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FM1236/HM

Manufacturer Part Number
FM1236/HM
Description
Desktop video & FM radio module system M, N
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Philips Components
T
Start - Adb - Ack - Db1 - Ack - Db2 - Ack - Cb - Ack - Pb - Ack - Stop.
Start - Adb - Ack - Cb - Ack - Pb - Ack - Db1 - Ack - Db2 - Ack - Stop.
Start - Adb - Ack - Db1 - Ack - Db2 - Ack - Cb - Ack - Stop.
Start - Adb - Ack - Db1 - Ack - Db2 - Ack - Stop.
Where:
READ mode
The in-lock can be read by setting the R/W bit to 1.
Notes
1. POR = Power On Reset. POR is internally set to 1 in case V
2. FL = In-lock flag; FL = 1: loop is phase-locked. The loop must be phase-locked during at least 8 periods of the internal
3. I2, I1 and I0 = digital information for I/O ports P2, P1 and P0 respectively.
4. A2, A1 and A0 = built-in 5-level A/D converter on the internal I/O port P6 (see Table “Digital AFC status”).
5. A = Acknowledge.
T
Start - Adb - Ack - STB - Ack - STB - - Stop (no Ack from processor = End-of-data).
Start - Adb - Ack - STB - - Stop (no Ack from processor = End-of-data).
Where:
1997 Feb 03
Address byte
Status byte
ELEGRAM EXAMPLES
ELEGRAM EXAMPLES
Start = start condition
Adb = address byte
Ack = acknowledge
Db1 = divider byte 1
Db2 = divider byte 2
Cb = control byte
Pb = ports byte
Stop = stop condition.
STB = Status byte.
Desktop video & FM radio module
system M, N
data is detected by the PLL IC.
reference frequency (either 7.8125 kHz, 3.90625 kHz or 6.25 kHz) before the FL flag is internally set to 1.
BYTE
POR
MSB
7
1
(WRITE
(READ
(1)
MODE
MODE
FL
6
1
(2)
)
)
I2
5
0
(3)
I1
4
0
(3)
15
S
BITS
drops below 3 V. The POR bit is reset when an end of
I0
3
0
(3)
MA1
A2
2
(4)
MA0
A1
1
(4)
Preliminary specification
A0
LSB
0
1
(4)
FM1236
A
A
A
(5)

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