XR88C681CN/40 EXAR [Exar Corporation], XR88C681CN/40 Datasheet - Page 39
XR88C681CN/40
Manufacturer Part Number
XR88C681CN/40
Description
CMOS DUAL CHANNEL UART (DUART)
Manufacturer
EXAR [Exar Corporation]
Datasheet
1.XR88C681CN40.pdf
(99 pages)
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IEI - Interrupt Enable Input
Note:
IEO - Interrupt Enable Output
Those interrupts which have been masked out by the IMR are
still disabled. However, if this input is at a logic “low”, then all
interrupts (whether masked or unmasked) are disabled.
Hence, IEI can act to globally disable all DUART interrupt
requests.
CPU
Figure 15. A Diagram of Numerous DUARTs Configured in an Interrupt
Daisy Chain (for Z-Mode Operation)
Note:
System Level Application of the IEI and IEO pins
Figure 15
Once the IEO pin has toggled “low”, and the CPU has ac-
knowledged the interrupt request and has completed the inter-
rupt service routine, the IEO pin will remain “low” until the user
invokes the “RESET IUS” command (see Table 3). Therefore,
if the DUART is going to operate in the Z-Mode, the user must
include the “RESET IUS” Command at the very end of the
DUART interrupt service routine.
XR88C681
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