XR21V1410IL16 EXAR [Exar Corporation], XR21V1410IL16 Datasheet
XR21V1410IL16
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XR21V1410IL16 Summary of contents
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JUNE 2009 GENERAL DESCRIPTION The XR21V1410 (V1410 enhanced Universal Asynchronous Receiver and Transmitter (UART) with a USB interface. The USB interface is fully compliant to Full Speed USB 2.0 specification that supports 12 Mbps USB data transfer rate. ...
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... SCL Interface 3.3V VCC GND IGURE IN UT SSIGNMENT GND USBD- USBD+ VCC ORDERING INFORMATION ART UMBER XR21V1410IL16 16-pin QFN 128-byte TX FIFO Fractional BRG 384-byte RX FIFO Internal Status and GPIOs/ Control Modem IO Registers UART GPIO0/RI 16-Pin 14 7 GPIO1/CD# ...
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REV. 1.0.0 PIN DESCRIPTIONS Pin Description 16-QFN N AME UART Signals GPIO0/RI# 7 GPIO1/CD# 6 GPIO2/DSR# 5 GPIO3/DTR# 4 GPIO4/CTS# 3 GPIO5/RTS# USB Interface Signals USBD+ 15 USBD- 14 I2C Interface Signals ...
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XR21V1410 1-CH FULL-SPEED USB UART Pin Description 16-QFN N AME SCL 12 Ancillary Signals 2 LOWPOWER 16 VCC 1, 13 GND N : Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain. OTE T YPE I 2 ...
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REV. 1.0.0 1.0 FUNCTIONAL DESCRIPTIONS 1.1 USB interface The USB interface of the V1410 is compliant with the USB 2.0 Full-Speed Specifications. The USB configuration model presented by the V1410 to the device driver is compatible to the Abstract Control ...
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XR21V1410 1-CH FULL-SPEED USB UART 1.2.1 EEPROM Contents The I2C address should be 0xA0. An EEPROM can be used to override default Vendor IDs and Device IDs, as well as other attributes and maximum power consumption. The EEPROM must contain ...
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REV. 1.0.0 In 9-bit data mode, two bytes of data must be written. The first byte that is loaded into the TX FIFO are the first 8 bits (data bits 7-0) of the 9-bit data. Bit-0 of the second byte ...
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XR21V1410 1-CH FULL-SPEED USB UART RTS CTS F IGURE UTO AND LOW Local UART UARTA Receiver FIFO Trigger Reached Auto RTS Trigger Level Transmitter Auto CTS Monitor Assert RTS# to Begin Transmission 1 RTSA# 2 CTSB# 3 ...
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REV. 1.0.0 1.4.5 Automatic DTR/DSR Hardware Flow Control Auto DTR/DSR hardware flow control behaves the same as the Auto RTS/CTS hardware flow control described above except that it uses the DTR# and DSR# signals. FLOW_CONTROL[2:0] = ’001’. GPIO_MODE[2:0] = ’010’. ...
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XR21V1410 1-CH FULL-SPEED USB UART 2.0 USB CONTROL COMMANDS The following table shows all of the USB Control Commands that are supported by the V1410. Commands included are standard USB commands, CDC-ACM commands and custom Exar commands ABLE ...
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REV. 1.0.0 T ABLE R EQUEST N AME T YPE CDC_ACM_IF 0x21 SEND_BREAK XR_SET_REG 0x40 XR_GETN_REG 0xC0 2.1 UART Block Numbers The table below lists the block numbers for accessing each of the UART channels and the UART Manager.. B ...
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XR21V1410 1-CH FULL-SPEED USB UART 3.0 REGISTER SET DESCRIPTION The internal register set of the V1410 consists of 2 different types of registers: UART Manager and UART registers. The UART Manager controls the TX, RX and FIFOs of all UART ...
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REV. 1.0.0 3.2 UART Register Map DDRESS EGISTER AME 0X00 Reserved 0X01 Reserved 0X02 Reserved 0X03 UART_ENABLE 0X04 CLOCK_DIVISOR0 0x05 CLOCK_DIVISOR1 0x06 CLOCK_DIVISOR2 0x07 TX_CLOCK_MASK0 0x08 TX_CLOCK_MASK1 0x09 RX_CLOCK_MASK0 0x0A RX_CLOCK_MASK1 0x0B CHARACTER_FORMAT 0x0C FLOW_CONTROL 0x0D Reserved ...
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XR21V1410 1-CH FULL-SPEED USB UART 3.3 UART Register Descriptions 3.3.1 UART_ENABLE Register Description (Read/Write) This register enables the UART TX and RX. For proper functionality, the UART TX and RX must be enabled in the following order: FIFO_ENABLE = 0x1 ...
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REV. 1.0 ABLE LOCK IVISOR AND AUD ATE BPS LOCK 1200 2400 4800 9600 19200 38400 57600 115200 230400 460800 500000 576000 921600 1000000 1152000 1500000 2000000 2500000 3000000 3125000 3500000 ...
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XR21V1410 1-CH FULL-SPEED USB UART T I NDEX ECIMAL ...
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REV. 1.0.0 3.3.5 CHARACTER_FORMAT Register Description (Read/Write) This register controls the character format such as the word length ( 9), parity (odd, even, forced ’0’, or forced ’1’) and number of stop bits (1 or 2). CHARACTER_FORMAT[3:0]: Data ...
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XR21V1410 1-CH FULL-SPEED USB UART FLOW_CONTROL[2:0]: Flow control mode select T ABLE FLOW_CONTROL[3]: Half-Duplex Mode • ...
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REV. 1.0.0 ERROR_STATUS[4]: Framing Error • Logic framing error • Logic framing error has been detected (clears after read). A framing error occurs when a stop bit is not present when it is expected. ...
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XR21V1410 1-CH FULL-SPEED USB UART GPIO_MODE[3]: Transceiver Enable Polarity • Logic 0 = Low for TX • Logic 1 = High for TX GPIO_MODE[7:4]: Reserved These register bits are reserved. When writing to these bits, the value should be ’0’. ...
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REV. 1.0.0 4.0 ELECTRICAL CHARACTERISTICS DC ELECTRICAL CHARACTERISTICS - POWER CONSUMPTION -40 NLESS OTHERWISE NOTED S P YMBOL ARAMETER I Power Supply Current CC I Suspend mode Current Susp DC ELECTRICAL CHARACTERISTICS - UART & GPIO ...
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XR21V1410 1-CH FULL-SPEED USB UART PACKAGE DIMENSIONS (16 PIN QFN - 0.9 Note: The control dimension is the millimeter column SYMBOL INCHES MILLIMETERS MIN MAX ...
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REV. 1.0.0 REVISION HISTORY D R ATE EVISION June 2009 1.0.0 Final Datasheet. EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no ...