XR21V1414IM48 EXAR [Exar Corporation], XR21V1414IM48 Datasheet
XR21V1414IM48
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XR21V1414IM48 Summary of contents
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JUNE 2009 GENERAL DESCRIPTION The XR21V1414 (V1414 enhanced 4-channel USB Universal Asynchronous Transmitter (UART). The USB interface is fully compliant to Full Speed USB 2.0 specification that supports 12 Mbps USB data transfer rate. The USB interface also ...
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XR21V1414 4-CH FULL-SPEED USB UART F 1. XR21V1414 B D IGURE LOCK IAGRAM 3.3V VCC GND USB Slave USBD+ Interface USBD- 2 SDA I C SCL Interface Internal 48MHz Oscillator 128-byte TX FIFO Fractional BRG 384-byte RX FIFO Internal Status ...
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... IGURE IN UT SSIGNMENT GPIOD0/RID# TXD RXD GND GND USBD- USBD+ VCC VCC GPIOD5/RTSD# GPIOD4/CTSD# GPIOD3/DTRD# ORDERING INFORMATION P N ART UMBER XR21V1414IM48 48-pin TQFP XR21V1414 42 48-TQFP ...
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XR21V1414 4-CH FULL-SPEED USB UART PIN DESCRIPTIONS Pin Description 48-QFN N AME UART Channel A Signals RXA 31 TXA 30 21 GPIOA0/RIA# 20 GPIOA1/CDA# 17 GPIOA2/DSRA# 16 GPIOA3/DTRA# 7 GPIOA4/CTSA# 6 GPIOA5/RTSA# UART Channel B Signals RXB ...
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REV. 1.0.0 Pin Description 48-QFN N AME GPIOB2/DSRB# 12 GPIOB3/DTRB# 11 GPIOB4/CTSB# 10 GPIOB5/RTSB# UART Channel C Signals RXC 23 TXC 22 29 GPIOC0/RIC# 28 GPIOC1/CDC# 27 GPIOC2/DSRC# 26 GPIOC3/DTRC# 25 GPIOC4/CTSC# 24 GPIOC5/RTSC# T YPE ...
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XR21V1414 4-CH FULL-SPEED USB UART Pin Description 48-QFN N AME UART Channel D Signals RXD 39 TXD 38 37 GPIOD0/RID# 34 GPIOD1/CDD# 3 GPIOD2/DSRD# 48 GPIOD3/DTRD# 47 GPIOD4/CTSD# 46 GPIOD5/RTSD# USB Interface Signals USBD+ 43 USBD- 42 ...
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REV. 1.0.0 Pin Description 48-QFN N AME SCL 36 Ancillary Signals 2 LOWPOWER 5, 18, 33, VCC 44 19, GND 32, 40 Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain. ...
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XR21V1414 4-CH FULL-SPEED USB UART 1.0 FUNCTIONAL DESCRIPTIONS 1.1 USB interface The USB interface of the V1414 is compliant with the USB 2.0 Full-Speed Specifications. The USB configuration model presented by the V1414 to the device driver is compatible to ...
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REV. 1.0.0 1.2.1 EEPROM Contents The I2C address should be 0xA0. An EEPROM can be used to override default Vendor IDs and Device IDs, as well as other attributes and maximum power consumption. The EEPROM must contain 8 bytes of ...
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XR21V1414 4-CH FULL-SPEED USB UART 1.4.1.1 9-Bit Data Mode In 9-bit data mode, two bytes of data must be written. The first byte that is loaded into the TX FIFO are the first 8 bits (data bits 7-0) of the ...
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REV. 1.0 RTS CTS F IGURE UTO AND LOW Local UART UARTA Receiver FIFO Trigger Reached Auto RTS Trigger Level Transmitter Auto CTS Monitor Assert RTS# to Begin Transmission 1 RTSA# 2 CTSB# 3 TXB Data Starts ...
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XR21V1414 4-CH FULL-SPEED USB UART 1.4.5 Automatic DTR/DSR Hardware Flow Control Auto DTR/DSR hardware flow control behaves the same as the Auto RTS/CTS hardware flow control described above except that it uses the DTR# and DSR# signals. FLOW_CONTROL[2:0] = ’001’. ...
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REV. 1.0.0 2.0 USB CONTROL COMMANDS The following table shows all of the USB Control Commands that are supported by the V1414. Commands included are standard USB commands, CDC-ACM commands and custom Exar commands ABLE R EQUEST N ...
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XR21V1414 4-CH FULL-SPEED USB UART T ABLE R EQUEST N AME T YPE CDC_ACM_IF 0x21 SEND_BREAK XR_SET_REG 0x40 XR_GETN_REG 0xC0 2.1 UART Block Numbers The table below lists the block numbers for accessing each of the UART channels and the ...
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REV. 1.0.0 3.0 REGISTER SET DESCRIPTION The internal register set of the V1414 consists of 2 different types of registers: UART Manager and UART registers. The UART Manager controls the TX, RX and FIFOs of all UART channels. The UART ...
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XR21V1414 4-CH FULL-SPEED USB UART 3.2 UART Register Map DDRESS EGISTER AME 0X00 Reserved 0X01 Reserved 0X02 Reserved 0X03 UART_ENABLE 0X04 CLOCK_DIVISOR0 0x05 CLOCK_DIVISOR1 0x06 CLOCK_DIVISOR2 0x07 TX_CLOCK_MASK0 0x08 TX_CLOCK_MASK1 0x09 RX_CLOCK_MASK0 0x0A RX_CLOCK_MASK1 0x0B CHARACTER_FORMAT 0x0C ...
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REV. 1.0.0 3.3 UART Register Descriptions 3.3.1 UART_ENABLE Register Description (Read/Write) This register enables the UART TX and RX. For proper functionality, the UART TX and RX must be enabled in the following order: FIFO_ENABLE_CHx = 0x1 UART_ENABLE = 0x3 ...
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XR21V1414 4-CH FULL-SPEED USB UART ABLE LOCK IVISOR AND AUD ATE BPS LOCK 1200 2400 4800 9600 19200 38400 57600 115200 230400 460800 500000 576000 921600 1000000 1152000 1500000 2000000 2500000 ...
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REV. 1.0 NDEX ECIMAL ...
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XR21V1414 4-CH FULL-SPEED USB UART 3.3.5 CHARACTER_FORMAT Register Description (Read/Write) This register controls the character format such as the word length ( 9), parity (odd, even, forced ’0’, or forced ’1’) and number of stop bits (1 or ...
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REV. 1.0.0 FLOW_CONTROL[2:0]: Flow control mode select T ABLE FLOW_CONTROL[3]: Half-Duplex Mode • Logic 0 = ...
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XR21V1414 4-CH FULL-SPEED USB UART ERROR_STATUS[4]: Framing Error • Logic framing error • Logic framing error has been detected (clears after read). A framing error occurs when a stop bit is not present when ...
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REV. 1.0.0 GPIO_MODE[3]: Transceiver Enable Polarity • Logic 0 = Low for TX • Logic 1 = High for TX GPIO_MODE[7:4]: Reserved These register bits are reserved. When writing to these bits, the value should be ’0’. When reading from ...
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XR21V1414 4-CH FULL-SPEED USB UART 4.0 ELECTRICAL CHARACTERISTICS DC ELECTRICAL CHARACTERISTICS - POWER CONSUMPTION -40 NLESS OTHERWISE NOTED S P YMBOL ARAMETER I Power Supply Current CC I Suspend mode Current Susp DC ELECTRICAL CHARACTERISTICS - ...
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REV. 1.0.0 PACKAGE DIMENSIONS (48 PIN TQFP - Seating Plane Note: The control dimension is the millimeter column SYMBOL ...
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XR21V1414 4-CH FULL-SPEED USB UART REVISION HISTORY D R ATE EVISION June 2009 1.0.0 Final Datasheet. EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR ...