HT82K68A-L HOLTEK [Holtek Semiconductor Inc], HT82K68A-L Datasheet

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HT82K68A-L

Manufacturer Part Number
HT82K68A-L
Description
Multimedia Keyboard Encoder 8-Bit MCU
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
Technical Document
Features
General Description
This device is an 8-bit high performance peripheral in-
terface IC, designed for multiple I/O products and multi-
media applications. It supports interface to a low speed
PC with multimedia keyboard or wireless keyboard in
Windows 95, Windows 98 or Windows 2000 environ-
ment. A HALT feature is included to reduce power con-
sumption.
Rev. 1.00
Tools Information
FAQs
Application Note
Operating voltage: 1.8V~5.5V
34 bidirectional I/O line and 3 CMOS output
One 8-bit programmable timer counter with overflow
interrupts
Crystal or RC oscillator
Watchdog Timer
3K 16 program EPROM
160 8 data RAM
One external interrupt pin (shared with PC2)
Multimedia Keyboard Encoder 8-Bit MCU
1
The mask version HT82K68A-L is fully pin and functionally
compatible with the OTP version HT82K68E-L device.
2.0V LVR by option (default disable)
HALT function and wake-up feature reduce power
consumption
Six-level subroutine nesting
Bit manipulation instructions
16-bit table read instructions
63 powerful instructions
All instructions in 1 or 2 machine cycles
20/28-pin SOP, 48-pin SSOP package
HT82K68E-L/HT82K68A-L
August 9, 2007

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HT82K68A-L Summary of contents

Page 1

... Six-level subroutine nesting Bit manipulation instructions 16-bit table read instructions 63 powerful instructions All instructions machine cycles 20/28-pin SOP, 48-pin SSOP package The mask version HT82K68A-L is fully pin and functionally compatible with the OTP version HT82K68E-L device. 1 August 9, 2007 ...

Page 2

... Block Diagram Rev. 1.00 HT82K68E-L/HT82K68A-L 2 August 9, 2007 ...

Page 3

... Bidirectional 4-bit input/output port. Software* instructions determine the CMOS PC4~PC7 I/O or None output or Schmitt Trigger input with or without pull-high resistor. Pull-high Bidirectional 8-bit input/output port. Software* instructions determine the CMOS PD0~PD7 I/O or None output or Schmitt Trigger input with or without pull-high resistor. Rev. 1.00 HT82K68E-L/HT82K68A-L Description 3 August 9, 2007 ...

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... I Standby Current (WDT enabled) STB1 I Standby Current (WDT Disabled) STB2 Input Low Voltage for I/O Ports V IL1 (Schmitt) Input High Voltage for I/O Ports V IH1 (Schmitt) Rev. 1.00 HT82K68E-L/HT82K68A-L Description =18mA at V =3. =18mA at V =3. =18mA at V =3. +6.0V Storage Temperature ........................... 125 ...

Page 5

... WDT1 Watchdog Time-out Period t WDT2 (System Clock) t External Reset Low Pulse Width RES t System Start-up Timer Period SST t Interrupt Pulse Width INT Note 1/f or 1/f SYS SYS1 SYS2 Rev. 1.00 HT82K68E-L/HT82K68A-L Test Conditions Min. V Conditions ...

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... S11 S10 Note: *11~*0: Program counter bits #11~#0: Instruction code bits Rev. 1.00 HT82K68E-L/HT82K68A-L When executing a jump instruction, conditional skip ex- ecution, loading PCL register, subroutine call, initial re- set, internal interrupt, external interrupt or return from subroutine, the PC manipulates the program transfer by loading the address corresponding to each instruction. ...

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... Note: *11~*0: Table location bits @7~@0: Table location bits Rev. 1.00 HT82K68E-L/HT82K68A-L Table Higher-order byte register (TBLH) is read only. The TBLH is read only and cannot be restored. If the main routine and the ISR (Interrupt Service Routine) both employ the table read instruction, the contents of the TBLH in the main routine are likely to be changed by the table read instruction used in the ISR ...

Page 8

... MP0 and MP1, are 8-bit registers which can be used to access the data memory by combining corre- sponding indirect addressing registers. Rev. 1.00 HT82K68E-L/HT82K68A-L Accumulator The accumulator is closely related to the ALU opera- tions also mapped to location 05H of the data mem- ory and is capable of carrying out immediate data operations ...

Page 9

... T0F Internal timer counter request flag (1= active; 0= inactive Unused bit, read as 0 Rev. 1.00 HT82K68E-L/HT82K68A-L Function Status (0AH) Register program which corrupt the desired control sequence, the contents should be saved in advance. The internal timer counter interrupt is initialized by set- ting the timer counter interrupt request flag (T0F; bit 5 of INTC), which is normally caused by a timer counter overflow ...

Page 10

... The RC oscillator provides the most cost effective solution. However, the frequency of the oscillation may vary with VDD, temperature and the Rev. 1.00 HT82K68E-L/HT82K68A-L chip itself due to process variations. It is, therefore, not suitable for timing sensitive operations where accurate oscillator frequency is desired. ...

Page 11

... CLRWDT times equal two), these two in- structions must be executed to clear the WDT; otherwise, the WDT may reset the chip because of the time-out. Rev. 1.00 HT82K68E-L/HT82K68A-L Power Down Operation - HALT The HALT mode is initialized by the HALT instruction and results in the following... ...

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... Unused bit, read as "0" 6 TM0 10= Timer mode (internal clock) 7 TM1 Rev. 1.00 HT82K68E-L/HT82K68A-L Reset Timing Chart Reset Circuit Reset Configuration Timer Counter A timer counter (TMR) is implemented in the microcontroller. The timer counter contains an 8-bit programmable count-up counter and the clock may come from the system clock divided by 4 ...

Page 13

... PE ---1 1111 ---1 1111 PEC ---1 1111 ---1 1111 Note: stands for warm reset u stands for unchanged x stands for unknown Rev. 1.00 HT82K68E-L/HT82K68A-L RESET Reset RESET Reset (Normal Operation) uuuu uuuu uuuu uuuu uuuu uuuu 000H 000H uuuu uuuu -uuu uuuu 0000 0111 ...

Page 14

... To function as an input, the corresponding latch of the control register must Rev. 1.00 HT82K68E-L/HT82K68A-L write 1 . The pull-high resistance will exhibit automatically if the pull-high option is selected. The input source(s) also depend(s) on the control register. If the control register bit input will read the pad state ...

Page 15

... To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system clock pulses before entering the normal operation. *2: Since low voltage has to be maintained in its original state and exceed 1ms, therefore 1ms delay enters the reset mode. Rev. 1.00 HT82K68E-L/HT82K68A-L The relationship between the voltage range for proper chip Note: ...

Page 16

... LVR enable/disable. User can configure whether enable or disable the circuit by configuration option. The Input type only Schmitt Trigger input type can used for HT82K68E-L. 7 The Input type Schmitt Trigger input or inverter input type can used for HT82K68A-L. Application Circuits RC Oscillator for Multiple I/O Applications ...

Page 17

... Rotate data memory left through carry Data Move MOV A,[m] Move data memory to ACC MOV [m],A Move ACC to data memory MOV A,x Move immediate data to ACC Bit Operation CLR [m].i Clear bit of data memory SET [m].i Set bit of data memory Rev. 1.00 HT82K68E-L/HT82K68A-L Description 17 Instruction Flag Cycle Affected 1 Z,C,AC,OV (1) 1 Z,C,AC,OV 1 Z,C,AC,OV ...

Page 18

... The flags may be affected by the execution status. If the Watchdog Timer is cleared by executing the CLR WDT1 or CLR WDT2 instruction, the TO and PDF are cleared. Otherwise the TO and PDF flags remain unchanged. (5) : ROM code TBHP option is enabled (6) : ROM code TBHP option is disabled Rev. 1.00 HT82K68E-L/HT82K68A-L Description 18 Instruction Flag Cycle Affected 2 ...

Page 19

... Affected flag(s) TO ADDM A,[m] Add the accumulator to the data memory Description The contents of the specified data memory and the accumulator are added. The result is stored in the data memory. Operation [m] ACC+[m] Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF PDF PDF ...

Page 20

... Operation Stack Program Counter+1 Program Counter Affected flag(s) TO CLR [m] Clear data memory Description The contents of the specified data memory are cleared to 0. Operation [m] 00H Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF PDF addr PDF OV Z ...

Page 21

... Affected flag( CPL [m] Complement data memory Description Each bit of the specified data memory is logically complemented (1 s complement). Bits which previously contained a 1 are changed to 0 and vice-versa. Operation [m] [m] Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF PDF OV ...

Page 22

... Data in the specified data memory is decremented by 1, leaving the result in the accumula- tor. The contents of the data memory remain unchanged. Operation ACC [m] 1 Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF (ACC.3~ACC.0)+6, AC1=AC (ACC.3~ACC.0), AC1=0 ACC.7~ACC.4+6+AC1,C=1 ACC.7~ACC.4+AC1,C=C ...

Page 23

... Operation Program Counter Affected flag(s) TO MOV A,[m] Move data memory to the accumulator Description The contents of the specified data memory are copied to the accumulator. Operation ACC [m] Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L Program Counter+1 PDF PDF PDF ...

Page 24

... Logical OR data memory with the accumulator Description Data in the data memory (one of the data memories) and the accumulator perform a bitwise logical_OR operation. The result is stored in the data memory. Operation [m] ACC OR [m] Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF Program Counter+1 ...

Page 25

... Description Data in the specified data memory is rotated 1 bit left with bit 7 rotated into bit 0, leaving the rotated result in the accumulator. The contents of the data memory remain unchanged. Operation ACC.(i+1) ACC.0 [m].7 Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L Stack PDF Stack PDF ...

Page 26

... The contents of the specified data memory and the carry flag are together rotated 1 bit right. Bit 0 replaces the carry bit; the original carry flag is rotated into the bit 7 position. Operation [m].i [m].(i+1); [m].i:bit i of the data memory (i=0~6) [m]. [m].0 Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF [m].i; [m].i:bit i of the data memory (i=0~6) PDF PDF OV ...

Page 27

... If the result is 0, the following instruction, fetched during the current instruction execution, is discarded and a dummy cycle is replaced to get the proper instruction (2 cy- cles). Otherwise proceed with the next instruction (1 cycle). Operation Skip if ([m] 1)=0, ACC Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF OV Z ...

Page 28

... Other- wise proceed with the next instruction (1 cycle). Operation Skip if [m].i 0 Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF ...

Page 29

... Swap data memory and place result in the accumulator Description The low-order and high-order nibbles of the specified data memory are interchanged, writ- ing the result to the accumulator. The contents of the data memory remain unchanged. Operation ACC.3~ACC.0 ACC.7~ACC.4 Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF PDF ...

Page 30

... The low byte of ROM code (current page) addressed by the table pointer (TBLP) is moved to the specified data memory and the high byte transferred to TBLH directly. Operation [m] ROM code (low byte) TBLH ROM code (high byte) Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF PDF ...

Page 31

... Logical XOR immediate data to the accumulator Description Data in the accumulator and the specified data perform a bitwise logical Exclusive_OR op- eration. The result is stored in the accumulator. The 0 flag is affected. Operation ACC ACC XOR x Affected flag(s) TO Rev. 1.00 HT82K68E-L/HT82K68A-L PDF PDF PDF ...

Page 32

... Package Information 20-pin SOP (300mil) Outline Dimensions Symbol Rev. 1.00 HT82K68E-L/HT82K68A-L Dimensions in mil Min. Nom. 394 290 14 490 Max. 419 300 20 510 104 August 9, 2007 ...

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... SOP (300mil) Outline Dimensions Symbol Rev. 1.00 HT82K68E-L/HT82K68A-L Dimensions in mil Min. Nom. 394 290 14 697 Max. 419 300 20 713 104 August 9, 2007 ...

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... SSOP (300mil) Outline Dimensions Symbol Rev. 1.00 HT82K68E-L/HT82K68A-L Dimensions in mil Min. Nom. 395 291 8 613 Max. 420 299 12 637 August 9, 2007 ...

Page 35

... Key Slit Width T1 Space Between Flange T2 Reel Thickness SOP 28W (300mil) Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.00 HT82K68E-L/HT82K68A-L Dimensions in mm 330 1.0 62 1.5 13.0+0.5 0.2 2.0 0.5 24.8+0.3 0.2 30.2 0.2 Dimensions in mm 330 1.0 62 1.5 13.0+0.5 0.2 2.0 0.5 24.8+0.3 0.2 30.2 0.2 35 August 9, 2007 ...

Page 36

... SSOP 48W Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.00 HT82K68E-L/HT82K68A-L Dimensions in mm 330 1.0 100 0.1 13.0+0.5 0.2 2.0 0.5 32.2+0.3 0.2 38.2 0.2 36 August 9, 2007 ...

Page 37

... Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.00 HT82K68E-L/HT82K68A-L Dimensions in mm 24.0+0.3 0.1 12.0 0.1 1.75 0.1 11.5 0.1 1.5+0.1 1.5+0.25 4.0 0.1 2.0 0.1 10.8 0.1 13.3 0.1 3.2 0.1 0.3 0.05 21.3 Dimensions in mm 24.0 0.3 12.0 0.1 1.75 0.1 11.5 0.1 1.5+0.1 1.5+0.25 4.0 0.1 2.0 0.1 10.85 0.1 18 ...

Page 38

... Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K1 Cavity Depth K2 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.00 HT82K68E-L/HT82K68A-L Dimensions in mm 32.0 0.3 16.0 0.1 1.75 0.1 14.2 0.1 2.0 Min. 1.5+0.25 4.0 0.1 2.0 0.1 12.0 0.1 16.20 0.1 2.4 0.1 3.2 0.1 0.35 0.05 25.5 38 August 9, 2007 ...

Page 39

... Holtek s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.00 HT82K68E-L/HT82K68A-L 39 August 9, 2007 ...

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