HT82K68 Holtek Semiconductor Inc, HT82K68 Datasheet

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... OTP EPROM 160´8 data RAM · General Description The HT82K68E is an 8-bit high performance peripheral interface IC, designed for multiple I/O products and multimedia applications. It supports interface to a low speed PC with multimedia keyboard or wireless keyboard in Windows 95, Windows 98 or Windows 2000 en- vironment ...

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... Block Diagram Preliminary 2 HT82K68E August 8, 2000 ...

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... ROM code option. Wake-up This pin is an I/O port. open drain output with pull-high resistor PC1 I/O Pull-high and can be used as DATA or CLOCK line of . This pin can be con- or None figured as a wake-up input by ROM code option. Preliminary Description 3 HT82K68E August 8, 2000 ...

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... Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged expo- sure to extreme conditions may affect device reliability. Preliminary Description =14mA Storage Temperature ................-50°C to 125°C +0.3V Operating Temperature .............-25°C to 70° HT82K68E =3.2V OL August 8, 2000 ...

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... 4.5V -2 =3. 120 ¾ 5V ¾ ¾ Crystal ¾ ¾ 5 HT82K68E Ta=25°C 5.5 V ¾ 0 ¾ ¾ ¾ ¾ mA ¾ ¾ 1.5 V ¾ ¾ ¾ ...

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... Without WDT prescaler 5V 9 Without WDT ¾ ¾ prescaler ¾ ¾ 1 Power-up or ¾ ¾ wake-up from HALT ¾ ¾ HT82K68E Ta=25°C Max. Unit 2 MHz ¾ MHz 2 ¾ MHz 2 20 MHz 90 180 ms 65 130 ...

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... Functional Description Execution flow The HT82K68E system clock is derived from ei- ther a crystal oscillator. The system cl ock is inter nal ded in to four non-overlapping clocks. One instruction cycle consists of four system clock cycles. Instruction fetching and execution are pipelined in such a way that a fetch takes one instruction cycle while decoding and execution takes the next instruction cycle ...

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... Program Counter * PC S11~S0: Stack register bits @7~@0: PCL bits 8 HT82K68E * August 8, 2000 ...

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... Table Higher-order byte regis- ter (TBLH;08H), the Watchdog Timer option Set- ting register (WDTS;09H), the Status register Table Location * P11~P8: Current program counter bits 9 HT82K68E ² ² August 8, 2000 ...

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... In addition, on entering an interrupt sequence or executing a subroutine call, the status regis- ter will not be automatically pushed onto the stack. If the contents of status are important and if the subroutine can corrupt the status register, precaution must be taken to save it properly. 10 HT82K68E August 8, 2000 ...

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... Interrupt The HT82K68E provides an internal timer counter interrupt. The interrupt control regis- ter (INTC;0BH) contains the interrupt control bits to set not only the enable/disable status but also the interrupt request flags. Once an interrupt subroutine is serviced, all other interrupts will be blocked (by clearing the EMI bit) ...

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... Unused bit, read as "0" ¾ Preliminary controlled, once the ²CALL subroutine² operates in the interrupt subroutine it will damage the original control sequence. Oscillator configuration There are two oscillator circuits in HT82K68E. Vector 08H OSC1 OSC2 (NMOS Open Drain Output) Crystal Oscillator System oscillator Both are designed for system clocks ...

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... If the ²CLR WDT² is selected (ie. CLR WDT times equal one), any execution of the CLR WDT in- struction will clear the WDT. In case ²CLR WDT1² and ²CLR WDT2² are chosen (ie. CLRWDT times equal two), these two instructions must be exe- 13 HT82K68E Division Ratio 1:1 1:2 1:4 1:8 ...

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... Once a wake-up event occurs, and the system clock comes from a crystal, it takes 1024 t (system clock period) to resume normal opera- tion. In other words, the HT82K68E will insert a dummy period after the wake-up. If the sys- tem clock comes from an RC oscillator, it contin- ues operating immediately. If the wake-up ...

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... Points to the top of SP the stack Timer counter A timer counter (TMR) is implemented in the HT82K68E. The timer counter contains an 8-bit programmable count-up counter and the clock may come from the system clock divided by 4. Using the internal instruction clock, there is only one reference time-base. ...

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... Preliminary Input/output ports There are 32 bidirectional input/output lines in the HT82K68E, labeled from PA to PE, which are mapped to the data memory of [12H], [14H], [16H], [18H] and [1AH] respectively. All these I/O ports can be used for input and output opera- tions. For input operation, these ports are ...

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... HT82K68E WDT Time-out (HALT) uuuu uuuu uu-u u--- 000H* uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu -uuu uuuu --11 uuuu -uuu uuuu ...

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... CPU , e xec ute the define tio ns (bit-operation), and then write the results back to the latches or the accumulator. Each line of port A and port C [0:3] has the capa- bility to wake-up the device. Input/output ports 18 HT82K68E August 8, 2000 ...

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... ROM code option The following shows six kinds of ROM code option in the HT82K68E. All the ROM code options must be defined to ensure proper system function. No. OSC type selection. This option is to decide Crystal oscillator is chosen as system 1 clock. If the Crystal oscillator is selected, the XST (Crystal Start-up Timer) default is acti- vated, otherwise the XST is disabled ...

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... Application Circuits m m Preliminary HT82K68E August 8, 2000 ...

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... Rotate data memory right through carry RLA [m] Rotate data memory left with result in ACC RL [m] Rotate data memory left RLCA [m] Rotate data memory left through carry with result in ACC RLC [m] Rotate data memory left through carry Preliminary Description 21 HT82K68E Flag Affected Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV ...

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... Note: x: 8-bit immediate data A: Accumulator addr: 12 bits program memory address -: Flag(s) is not affected Preliminary Description m: 7-bit data memory address i: 0~7 number of bits Ö: 0~7 number of bits *: Flag(s) may be affected by the execution status 22 HT82K68E Flag Affected None None None None None None None None None ...

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... Preliminary ¾ ¾ Ö Ö Ö Ö ¾ ¾ Ö Ö Ö Ö ¾ ¾ Ö Ö Ö Ö ¾ ¾ Ö Ö Ö Ö 23 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ Ö Ö Ö Ö ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ 24 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 25 HT82K68E August 8, 2000 ...

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... Bits which previously contained a 1 are changed to 0 and vice-versa. Operation [m] ¬ [m] Affected flag(s) TC2 TC1 ¾ ¾ Preliminary ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ 26 HT82K68E August 8, 2000 ...

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... Data in the specified data memory is decremented by1. Operation [m] ¬ [m] 1 Affected flag(s) TC2 TC1 ¾ ¾ Preliminary ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ Ö ¾ ¾ 27 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ 28 HT82K68E August 8, 2000 ...

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... ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 29 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 30 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 31 HT82K68E August 8, 2000 ...

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... Affected flag(s) TC2 TC1 ¾ ¾ Preliminary ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ ¾ 32 HT82K68E August 8, 2000 ...

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... ACC.7 ¬ ¬ [m].0 Affected flag(s) TC2 TC1 ¾ ¾ Preliminary ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö 33 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ Ö Ö Ö Ö ¾ ¾ Ö Ö Ö Ö ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 34 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 35 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Ö Ö Ö Ö ¾ ¾ Ö Ö Ö Ö ¾ ¾ Ö Ö Ö Ö 36 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 37 HT82K68E August 8, 2000 ...

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... Preliminary ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ 38 HT82K68E August 8, 2000 ...

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... Exclusive_OR operation. The result is stored in the accumulator. The 0 flag is affected. Operation ACC ¬ ACC ²XOR² x Affected flag(s) TC2 TC1 ¾ ¾ Preliminary ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ 39 HT82K68E August 8, 2000 ...

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... Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. HT82K68E 40 August 8, 2000 ...