HT82K68A_01 HOLTEK [Holtek Semiconductor Inc], HT82K68A_01 Datasheet
HT82K68A_01
Related parts for HT82K68A_01
HT82K68A_01 Summary of contents
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Multimedia Keyboard Encoder Mask MCU Features · Operating voltage: 2.4V~5.5V · 32/34 bidirectional I/O lines · One 8-bit programmable timer counter with overflow interrupts · Crystal or RC oscillator · Watchdog Timer · 3K´16 program ROM · 160´8 data ...
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Pin Assignment Pin Description Mask Pin Name I/O Option Wake-up Bidirectional 8-bit input/output port. Each bit can be configured as a wake-up input PA0~PA7 I/O Pull-high by mask option. Software* instructions determine the CMOS output or Schmitt Trig- or None ...
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Mask Pin Name I/O Option Bidirectional input/output port. Software* instruction determine the CMOS output or Pull-high Schmitt Trigger input with or without pull-high resistor. PE0~PE1 I/O or None If PE0 output 1, rising edge of PC2 trigger INT circuit. PE0 ...
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Symbol Parameter V Input Low Voltage for I/O Ports (CMOS) IL2 V Input High Voltage for I/O Ports (CMOS) IH2 V Input Low Voltage (RESET) IL3 V Input High Voltage (RESET) IH3 I I/O Port Sink Current OL I I/O ...
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Functional Description Execution flow The HT82K68A system clock is derived from either a crystal oscillator. The system clock is internally divided into four non-overlapping clocks. One instruc- tion cycle consists of four system clock cycles. Instruction fetching ...
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Program memory Certain locations in the program memory are reserved for special usage: · Location 000 This area is reserved for the initialization program. Af- ter chip reset, the program always begins execution at location 000H. · Location 004H Location ...
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RAM mapping (INTC;0BH), the timer counter register (TMR;0DH), the timer counter control register (TMRC;0EH), the I/O regis- ters (PA;12H, PB;14H, PC;16H, PD;18H, PE;1AH) and the I/O control registers (PAC;13H, PBC;15H, PCC;17H, PDC;19H, PEC;1BH). The remaining space before the 60H is ...
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Labels Bits C is set if an operation results in a carry during an addition operation borrow does not C 0 take place during a subtraction operation; otherwise C is cleared also affected by a ...
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PC2. When PE0 is output low, the external interrupt is triggered by a high to low transition of PC2. During the execution of an interrupt subroutine, other in- terrupt acknowledgements are held until ...
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The Watchdog Timer can be disabled by mask option. If the Watchdog Timer is disabled, all the executions related to the WDT results in no opera- tion. Once the internal ...
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Some registers remain unchanged during other reset conditions. Most registers are reset to the ²initial condition² when the reset condi- tions are met. By examining the PD and TO flags, the program can distinguish ...
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To enable the counting operation, the timer ON bit (TON; bit 4 of TMRC) should be set the case of timer counter OFF condition, writing data to the timer counter preload register will also reload that data ...
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Input/output ports There are 32 bidirectional input/output lines in the HT82K68A, labeled from PA to PE, which are mapped to the data memory of [12H], [14H], [16H], [18H] and [1AH] respectively. All these I/O ports can be used for input ...
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Mask option The following shows five kinds of mask option in the HT82K68A. All the mask options must be defined to ensure proper system function. No. WDT source selection. There are three types of selection: on-chip RC oscillator, instruction clock ...
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Instruction Set Summary Mnemonic Arithmetic ADD A,[m] Add data memory to ACC ADDM A,[m] Add ACC to data memory ADD A,x Add immediate data to ACC ADC A,[m] Add data memory to ACC with carry ADCM A,[m] Add ACC to ...
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Mnemonic Branch Jump unconditionally JMP addr SZ [m] Skip if data memory is zero SZA [m] Skip if data memory is zero with data movement to ACC SZ [m].i Skip if bit i of data memory is zero SNZ [m].i ...
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Instruction Definition ADC A,[m] Add data memory and carry to the accumulator Description The contents of the specified data memory, accumulator and the carry flag are added si- multaneously, leaving the result in the accumulator. ACC ¬ ACC+[m]+C Operation Affected ...
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AND A,[m] Logical AND accumulator with data memory Description Data in the accumulator and the specified data memory perform a bitwise logical_AND op- eration. The result is stored in the accumulator. ACC ¬ ACC ²AND² [m] Operation Affected flag(s) TC2 ...
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CLR [m].i Clear bit of data memory Description The bit i of the specified data memory is cleared to 0. [m].i ¬ 0 Operation Affected flag(s) TC2 TC1 ¾ ¾ CLR WDT Clear Watchdog Timer Description The WDT and the ...
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CPLA [m] Complement data memory and place result in the accumulator Description Each bit of the specified data memory is logically complemented (1s complement). Bits which previously contained a 1 are changed to 0 and vice-versa. The complemented result is ...
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HALT Enter power down mode Description This instruction stops program execution and turns off the system clock. The contents of the RAM and registers are retained. The WDT and prescaler are cleared. The power down bit (PD) is set and ...
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MOV A,x Move immediate data to the accumulator Description The 8-bit data specified by the code is loaded into the accumulator. ACC ¬ x Operation Affected flag(s) TC2 TC1 ¾ ¾ MOV [m],A Move the accumulator to data memory Description ...
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RET Return from subroutine Description The program counter is restored from the stack. This is a 2-cycle instruction. PC ¬ Stack Operation Affected flag(s) TC2 TC1 ¾ ¾ RET A,x Return and place immediate data in the accumulator Description The ...
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RLC [m] Rotate data memory left through carry Description The contents of the specified data memory and the carry flag are rotated 1 bit left. Bit 7 re- places the carry bit; the original carry flag is rotated into the ...
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RRCA [m] Rotate right through carry and place result in the accumulator Description Data of the specified data memory and the carry flag are rotated 1 bit right. Bit 0 replaces the carry bit and the original carry flag is ...
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SET [m] Set data memory Description Each bit of the specified data memory is set to 1. [m] ¬ FFH Operation Affected flag(s) TC2 TC1 ¾ ¾ SET [m]. i Set bit of data memory Description Bit i of the ...
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SUB A,[m] Subtract data memory from the accumulator Description The specified data memory is subtracted from the contents of the accumulator, leaving the result in the accumulator. ACC ¬ ACC+[m]+1 Operation Affected flag(s) TC2 TC1 ¾ ¾ SUBM A,[m] Subtract ...
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SZ [m] Skip if data memory is 0 Description If the contents of the specified data memory are 0, the following instruction, fetched during the current instruction execution, is discarded and a dummy cycle is replaced to get the proper ...
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XOR A,[m] Logical XOR accumulator with data memory Description Data in the accumulator and the indicated data memory perform a bitwise logical Exclu- sive_OR operation and the result is stored in the accumulator. ACC ¬ ACC ²XOR² [m] Operation Affected ...
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Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Sales Office) 11F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales ...