HT82K68E_07 HOLTEK [Holtek Semiconductor Inc], HT82K68E_07 Datasheet - Page 10

• Manufacturer Part Number: HT82K68E_07
• Description: Multimedia Keyboard Encoder 8-Bit OTP MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

During the execution of an interrupt subroutine, other in-
terrupt acknowledgements are held until the RETI in-
struction is executed or the EMI bit and the related
interrupt control bit are set to 1 (if the stack is not full). To
return from the interrupt subroutine, a RET or RETI in-
struction may be invoked. RETI will set the EMI bit to en-
able an interrupt service, but RET will not.
Interrupts occurring in the interval between the rising
edges of two consecutive T2 pulses, will be serviced
on the latter of the two T2 pulses, if the corresponding
interrupts are enabled. In the case of simultaneous re-
quests, the following table shows the priority that is ap-
plied. These can be masked by resetting the EMI bit.
The timer counter interrupt request flag (T0F), external
interrupt request (EIF) enable timer counter bit (ET0I),
enable external interrupt bit (EEI) and enable master
interrupt bit (EMI) constitute an interrupt control regis-
ter (INTC) which is located at 0BH in the data memory.
EMI, ET0I and EEI, are used to control the en-
abling/disabling of interrupts. These bits prevent the
requested interrupt from being serviced. Once the in-
terrupt request flags (T0F) are set, they will remain in
the INTC register until the interrupts are serviced or
cleared by a software instruction.
It is suggested that a program does not use the CALL
subroutine within the interrupt subroutine. Because
interrupts often occur in an unpredictable manner or
need to be serviced immediately in some applications,
if only one stack is left and enabling the interrupt is not
well controlled, once the CALL subroutine operates in
the interrupt subroutine it will damage the original con-
trol sequence.
Oscillator Configuration
There are two oscillator circuits in HT82K68E. Both are
designed for system clocks; the RC oscillator and the
Crystal oscillator, which are determined by mask op-
tions. No matter what oscillator type is selected, the
signal provides the system clock. The HALT mode
stops the system oscillator and resists the external sig-
nal to conserve power.
Rev. 2.00
External interrupt 1
Timer counter overflow
Interrupt Source
Vector
04H
08H
Watchdog Timer
10
If an RC oscillator is used, an external resistor between
OSC1 and VDD is needed and the resistance must range
from 20k
available on OSC2, which can be used to synchronize
external logic. The RC oscillator provides the most cost
effective solution. However, the frequency of the oscilla-
tion may vary with VDD, temperature and the chip itself
due to process variations. It is, therefore, not suitable for
timing sensitive operations where accurate oscillator fre-
quency is desired.
If the Crystal oscillator is used, a crystal across OSC1
and OSC2 is needed to provide the feedback and phase
shift needed for oscillator, no other external components
are needed. Instead of a crystal, the resonator can also
be connected between OSC1 and OSC2 to get a fre-
quency reference, but two external capacitors in OSC1
and OSC2 are required.
The WDT oscillator is a free running on-chip RC oscilla-
tor, and no external components are required. Even if the
system enters the power down mode, the system clock is
stopped, but the WDT oscillator still works for a period of
approximately 78 s. The WDT oscillator can be disabled
by mask option to conserve power.
Watchdog Timer - WDT
The WDT clock source is implemented by a dedicated
RC oscillator (WDT oscillator) or instruction clock (sys-
tem clock divided by 4), decided by mask options. This
timer is designed to prevent a software malfunction or se-
quence jumping to an unknown location with unpredict-
able results. The Watchdog Timer can be disabled by
mask option. If the Watchdog Timer is disabled, all the ex-
ecutions related to the WDT results in no operation.
Once the internal WDT oscillator (RC oscillator normally
with a period of 78 s) is selected, it is first divided by 256
to 47k . The system clock, divided by 4, is
System Oscillator
HT82K68E
July 10, 2007