HN58X2508TIE RENESAS [Renesas Technology Corp], HN58X2508TIE Datasheet
HN58X2508TIE
Related parts for HN58X2508TIE
HN58X2508TIE Summary of contents
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HN58X2508I HN58X2516I Serial Peripheral Interface 8k EEPROM (1024-word × 8-bit) 16k EEPROM (2048-word × 8-bit) Electrically Erasable and Programmable Read Only Memory Description HN58X25xxx Series is the Serial Peripheral Interface (SPI) EEPROM (Electrically Erasable and Programmable ROM). It realizes high ...
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... Lead free product. Ordering Information Type No. Internal organization 8-kbit (1024 × 8-bit) HN58X2508FPIE 16-kbit (2048 × 8-bit) HN58X2516FPIE 8-kbit (1024 × 8-bit) HN58X2508TIE 16-kbit (2048 × 8-bit) HN58X2516TIE Rev.2.00, Aug.19.2004, page Operating voltage Frequency 1 5 MHz (2 5 MHz (1 ...
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HN58X2508I/HN58X2516I Pin Arrangement Pin Description Pin name Function C Serial clock D Serial data input Q Serial data output S Chip select W Write protect HOLD Hold V Supply voltage CC V Ground SS Rev.2.00, ...
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HN58X2508I/HN58X2516I Block Diagram HOLD D Q Rev.2.00, Aug.19.2004, page High voltage generator Memory array Y-select & Sense amp. Serial-parallel converter ...
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HN58X2508I/HN58X2516I Absolute Maximum Ratings Parameter Supply voltage relative Input voltage relative Operating temperature range* Storage temperature range Notes: 1. Including electrical characteristics and data retention. (min): −3.0 V for pulse width ≤ 50 ...
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HN58X2508I/HN58X2516I DC Characteristics Parameter Symbol Input leakage current I LI Output leakage current current Standby Active I CC1 I CC2 Output voltage Rev.2.00, Aug.19.2004, page Min Max ...
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HN58X2508I/HN58X2516I AC Characteristics Test Conditions Input pules levels: × 0 × 0 Input rise and fall time: ≤ Input and output timing reference levels: V × ...
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HN58X2508I/HN58X2516I Parameter Clock frequency S active setup time S not active setup time S deselect time S active hold time S not active hold time Clock high time Clock low time Clock rise time Clock fall time Data in setup ...
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HN58X2508I/HN58X2516I Parameter Clock frequency S active setup time S not active setup time S deselect time S active hold time S not active hold time Clock high time Clock low time Clock rise time Clock fall time Data in setup ...
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HN58X2508I/HN58X2516I Timing Waveforms Serial Input Timing S t CHSL C t DVCH D MSB IN High Impedance Q Hold Timing S t CHHL HOLD Rev.2.00, Aug.19.2004, page CHSH t SLCH t t CLCH ...
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HN58X2508I/HN58X2516I Output Timing S C ADDR D LSB IN t CLQV t CLQX t CLQX Q Rev.2.00, Aug.19.2004, page CLQV LSB OUT t QLQH t QHQL t SHQZ ...
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HN58X2508I/HN58X2516I Pin Function Serial data output (Q) This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of serial clock (C). Serial data input (D) This input signal is ...
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HN58X2508I/HN58X2516I Functional Description Status Register The following figure shows the Status Register Format. The Status Register contains a number of status and control bits that can be read or set (as appropriate) by specific instructions. Status Register Format b7 SRWD ...
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HN58X2508I/HN58X2516I Instruction Set Instruction WREN WRDI RDSR WRSR READ WRITE Write Enable (WREN): The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is to send a Write ...
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HN58X2508I/HN58X2516I Write Disable (WRDI): One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown in the following figure, to send this instruction to the device, chip select (S) ...
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HN58X2508I/HN58X2516I Read Status Register(RDSR): The Read Status Register (RDSR) instruction allows the Status Register to be read. The Status Register may be read at any time, even while a Write or Write Status Register cycle is in progress. When one ...
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HN58X2508I/HN58X2516I SRWD bit: The Status Register Write Disable (SRWD) bit is operated in conjunction with the write protect (W) signal. The Status Register Write Disable (SRWD) bit and write protect (W) signal allows the device to be put in the ...
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HN58X2508I/HN58X2516I Write Status Register (WRSR) Sequence Rev.2.00, Aug.19.2004, page ...
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HN58X2508I/HN58X2516I Read from Memory Array (READ): As shown in the following figure, to send this instruction to the device, chip select (S) is first driven low. The bits of the instruction byte and the address bytes are then shifted in, ...
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HN58X2508I/HN58X2516I Write to Memory Array (WRITE): As shown in the following figure, to send this instruction to the device, chip select (S) is first driven low. The bits of the instruction byte, address byte, and at least one data byte ...
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HN58X2508I/HN58X2516I Byte Write (WRITE) Sequence (Page Instruction ...
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HN58X2508I/HN58X2516I Data Protect The protection features of the device are summarized in the following table. When the Status Register Write Disable (SRWD) bit of the Status Register is 0 (its initial delivery state possible to write to the ...
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HN58X2508I/HN58X2516I Protection Modes W signal SRWD bit Mode 1 0 Software protected (SPM Hardware protected (HPM) Note defined by the values in the Block Protected (BP1, BP0) bits of the Status Register, ...
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HN58X2508I/HN58X2516I Hold Condition The hold (HOLD) signal is used to pause any serial communications with the device without resetting the clocking sequence. During the hold condition, the serial data output (Q) is high impedance, and serial data input (D) and ...
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HN58X2508I/HN58X2516I Notes Data Protection at V On/Off CC is turned on or off, noise on S inputs generated by external circuits (CPU, etc) may act as a trigger When V CC and turn the EEPROM to unintentional program mode. To ...
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HN58X2508I/HN58X2516I Package Dimensions HN58X2508FPIE/HN58X2516FPIE (FP-8DBV) 4.89 5.15 Max 0.69 Max 1.27 *0.40 ± 0.05 *Pd Plating Rev.2.00, Aug.19.2004, page 6.02 ± 0.18 1.06 0 ˚ – 8 ˚ + 0.289 0.60 – 0.194 ...
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... HN58X2508I/HN58X2516I HN58X2508TIE/HN58X2516TIE (TTP-8DAV) 3.00 3.30 Max 0.65 *0.20 ± 0.05 0.13 M 0.805 Max 0.10 *Pd Plating Rev.2.00, Aug.19.2004, page 1.00 6.40 ± 0.20 0˚ – 8˚ 0.50 ± 0.10 Package Code TTP-8DAV JEDEC — JEITA — Mass (reference value) 0.034 g Unit: mm ...
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Revision History Rev. Date Contents of Modification Page Description 1.00 Jul.23.2004 Initial issue 2.00 Aug.19.2004 26-27 Package Dimensions: Change of Dimensions TTP-8DV to TTP-8DAV HN58X2508I/HN58X2516I Data Sheet ...
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Sales Strategic Planning Div. Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble ...