AT88RF020-WBC-10 ATMEL Corporation, AT88RF020-WBC-10 Datasheet - Page 3

• Manufacturer Part Number: AT88RF020-WBC-10
• Description: 13.56 MHz/ 2048-bit RFID EEPROM
• Manufacturer: ATMEL Corporation

Communications
Command/Data
Transmission Frame
CRC
2010B–RFID–03/02
Signature: This field is written unmodified into the first six bytes of Page 2 via the
COUNT instruction. It is expected that this value will be related to the count and may be
encrypted by the reader/writer. In this manner, the Counter and Signature fields together
can provide an additional level of security from tampering.
Pages 0, 1 and 2 can always be read by the system; Page 3 may never be read by the
system; and all remaining pages can be read only after the proper password has been
sent to the chip. The LockBits field within Page 0 can be modified only through the use
of the LOCK command and only after the proper password has been sent to the chip.
The contents of Page 2 can only be modified using the COUNT command—again, only
after the proper password has been sent to the chip.
All other pages (1 and 3 through 31) can be written to only after the proper password
has been validated by the chip. The first four bytes of Page 0 comprise the serial num-
ber (PUPI) and, although the adjacent LockBits field is updateable, the serial number
can never be changed during any kind of operation.
The electrical signaling of the chip is fully compatible with ISO 14443-2, “Radio Fre-
quency Power and Signal Interface,” version 1999(e) for Type B only. Anticollision
operation and frame formatting is compatible with ISO 14443-3 Type B, “Initialization
and Anticollision,” version 2000(e), Type B only.
All data sent between the PICC and PCD is sent as characters (see ISO 14443-3, sec-
tion 7.1.1). The character is composed of a start bit (logic “0”), 8 bits of data and a stop
bit (logic “1”).
Between characters is an extra guard time (EGT) that must not exceed 6 ETUs (~57
microseconds (µs)) for data sent to the PICC and will be two ETUs for data sent to the
PCD (see ISO 14443-3, section 7.1.2).
The PICC will automatically resynchronize character reception (internal clocks) with the
start bit of each incoming character.
Groups of characters exchanged between the PCD and PICC comprise a frame, which
is delimited by a Start of Frame (SOF) and an End of Frame (EOF) signal protocol (see
ISO 14443-3, sections 7.1.3–7.1.5).
After the READ command has been received by the PICC, the PICC will respond with
the data frame following a delay of 8 ETUs (~75.5 µs) and transmit a subcarrier for a
period of 10 ETUs (~94.4 µs) with no phase changes (see ISO 14443-3, section 7.1.6,
and ISO 14443-2, section 9.2.5.).
Note:
A 2-byte CRC code is included in all frame transmissions. The CRC polynomials are
defined as:
This is a hex polynomial of 1021. The CRC register is initialized to 0xFFFF. When
receiving information from the system, the device computes the CRC on the incoming
command, data and CRC bytes (start/stop bits, SOT, EOT and EGT are ignored). When
the last bit of the CRC has been received, the value in the CRC register should be
0x0000. When the device transmits data, the CRC is computed based on all outgoing
data bits.
x
16
+ x
This device ignores attempts to reduce the minimum TR0 and TR1 values from the ISO
14443-2 defaults as may be specified by the PCD in the ATTRIB command (see ISO
14443-3, sections 7.10.3.1 and 7.10.3.2.).
12
+ x
5
+ x
0
AT88RF020
3