XRT5683A Exar Corporation, XRT5683A Datasheet - Page 2

• Manufacturer Part Number: XRT5683A
• Description: PCM Line Interface Chip
• Manufacturer: Exar Corporation

PIN CONFIGURATION
PIN DESCRIPTION
Pin #
XR-T5683A
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Rev. 2.01
TANK BIAS
RXDATA+
TXDATA+
TANK BIAS
RXDATA-
TXDATA-
Symbol
RXDATA+
RGND
RNEG
RPOS
TNEG
TGND
TPOS
RCLK
RXDATA-
RV
TCLK
TV
BIAS
PDC
TE
RGND
CC
RCLK
CC
RV
BIAS
PDC
18 Lead PDIP (0.300”)
TE
CC
1
2
3
4
5
6
7
8
9
Type
O
O
O
O
O
O
O
O
I
I
I
I
I
Description
Peak Detector Capacitor. This pin should be connected to a 0.1 F capacitor.
Receive Analog Input Positive. Line analog input.
Receive Analog Input Negative. Line analog input.
Tank Excitation Output. This output connects to one side of the tank circuitry.
Bias. This output is to be connected to the center tap of the receive transformer.
Tank Bias. The tank circuitry is biased via this output.
Receiver Ground. To minimize ground interference a separate pin is used to ground the
receive section.
Recovered Receive Clock. Recovered clock signal to the terminal equipment.
Receive Supply Voltage. 5V supply voltage to the receive section.
Receive Negative Data. Negative pulse data output to the terminal equipment (active low).
Receive Positive Data. Positive pulse data output to the terminal equipment (active low).
Transmit Negative Data. TNEG is valid while TCLK is high.
Transmit Positive Output. Transmit bipolar signal is driven to the line via a transformer.
Transmit Ground.
Transmit Negative Output. Transmit bipolar signal is driven to the line via a transformer.
Transmit Clock. Timing element for TPOS and TNEG.
Transmit Positive Data. TPOS is valid while TCLK is high.
Transmit Supply Voltage. 5V supply voltage to the transmit section.
18
17
16
15
14
13
12
11
10
TV
TPOS
TCLK
TXDATA-
TGND
TXDATA+
TNEG
RPOS
RNEG
CC
2
TANK BIAS
RXDATA+
RXDATA-
RGND
18 Lead SOIC (JEDEC, 0.300”)
RCLK
RV
BIAS
PDC
TE
CC
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
10
11
TV
TPOS
TCLK
TXDATA-
TGND
TXDATA+
TNEG
RPOS
RNEG
CC