RTC4553 ETC, RTC4553 Datasheet - Page 2

• Manufacturer Part Number: RTC4553
• Description: SERIAL-INTERFACE REAL TIME CLOCK MODULE
• Manufacturer: ETC

Note:
___
SCK
___
SCK
___
SCK
___
SCK
__
CS
__
CS
S
S
___
WR
___
WR
S
__
CS
__
CS
CS
CS
D
0
1
2
3
4
5
6
7
8
9
A
B
C
E
F
IN
IN
OUT
0
0
Switching characteristics
, and CS
1
1
32.768 kHz
0
0
Block diagram
Register table
disenable to S
data setup time
data Hold time
enable to S
enable to S
setup time
setup time
hold time
input frequency
pause time
hold time
delay time
“L” time
“H” time
A
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Address
TEST bit should be “0”.
3
TP
S
SCK
1
CS
CS
WR
OUT
OUT
enable to S
OSC
S
A
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
IN
Item
2
1
0
OUT
OUT
OUT
A
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
high Z
1
output
high Z
OUT
control
Output
control
output
Input
A
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Counter
Output control
Register
symbol
MO
MI
MO
MI
S
H
D
Y
S
H
D
Y
C
C
C
W
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
10
10
Symbol
10
10
1
1
1
2
3
SCK
WSCKL
WSCKH
PS
SCS
HCS
SD
HD
SWR
HWR
DSO
DSZ1
DSZ2
DPZ1
DPZ2
10
1
1
1
10
1
Control
register
Sec. Min. Hou.
Shift register
PM/AM
BUSY
SYSR
1
TPS
mo
mi
y
D
S
h
d
y
0
0
0
0
0
Condition
C
80
8
3
8
8
8
8
(Ta=-30˚C to +70˚C, V
L
8
=100pF
—
—
register
Control
Control circuit
2
30ADJ
PONC
TEST
mi
mo
S
mi
Week
y
D
S
w
h
d
y
Day
0
0
0
of
40
40
4
4
4
4
2
40
4
4
4
Min.
register
1.0
0.5
0.2
1.0
0.5
Control
—
—
0
Day Mon. Year
3
Typ.
150
CNTR
Counter control register
—
—
—
mi
MS
mo
mi
S
h
d
y
—
D
S
w
DD
h
d
y
0
20
20
20
20
MODE 0
2
2
2
2
1
20
2
2
=5V 10%, GND=OV)
2
1
(120bit)
Max.
500
500
100
RAM
—
—
24/12
mo
mi
mo
MS
mi
S
h
d
y
D
w
S
h
d
y
10
10
10
10
1
1
1
0
1
10
1
1
10
Unit
1
0
kHz
µs
ns
1-second digit register
10-second digit register
1-minute digit register
10-minute digit register
1-hour digit register
10-hour digit register
Day of the week digit register
1-day digit register
10-day digit register
1-month digit register
10-month digit register
1-year digit register
10-year digit register
Control register 1
Control register 2
Control register 3
Register name
CS
SCK
S
WR
S
CS
SCK
SCK
S
CS
TP
Timing chart
IN
OUT
OUT
0
OUT
0
1
t
SCS
10%
10%
10%
90%
10%
t
90%
90%
90%
DSZ1
10%
1/f
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
t
RA
RA
t
D
WCKL
t
t
10%
DSO
CLK
DPZ1
3
SD
11
15
19
23
27
31
35
39
43
47
51
55
59
3
7
User RAM Domain 1
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
Same as MODE 0
D
90%
10%
MODE 1
2
90%
10
14
18
22
26
30
34
38
42
46
50
54
58
2
6
t
t
HD
WCKH
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
D
10%
1
13
17
21
25
29
33
37
41
45
49
53
57
1
5
9
Real time clock module
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
t
RA
RA
RA
SWR
D
t
90%
10%
0
DPZ2
12
16
20
24
28
32
36
40
44
48
52
56
0
4
8
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
D
3
103
107
111
115
119
63
67
71
75
79
83
87
91
95
99
t
User RAM Domain 2
PS
Same as MODE 0
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
t
D
t
HWR
MODE 2
HCS
102
106
110
114
118
2
62
66
70
74
78
82
86
90
94
98
t
90%
DSZ2
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
D
1
101
105
109
113
117
61
65
69
73
77
81
85
89
93
97
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
RA
D
100
104
108
112
116
0
60
64
68
72
76
80
84
88
92
96
48