GS82032 ETC, GS82032 Datasheet - Page 15

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GS82032

Manufacturer Part Number
GS82032
Description
64K x 32 2M Synchronous Burst SRAM
Manufacturer
ETC
Datasheet

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Rev: 1.09 7/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Flow Through Read Cycle Timing
DQ
B
A
A
ADSC
ADSP
–DQ
A
0
ADV
–B
–An
GW
BW
CK
E
E
E
D
G
D
2
3
1
Hi-Z
tOLZ
tS tH
tS
tS tH
tS
Single Read
tS
RD1
tH
tH
tH
tLZ
tKQ
tOE
tS
tS
tS
tH
Q
tOHZ
1
A
tKH
tS tH
RD2
E
2
and E
15/23
tKL
3
Q
only sampled with ADSP or ADSC
2
A
tKQX
tKC
Q
Burst Read
2
ADSP is blocked by E
E
B
1
Suspend Burst
masks ADSP
Q
2
C
GS82032AT/Q-180/166/133/100
ADSC initiated read
1
inactive
RD3
Q
2
Suspend Burst
D
© 2000, Giga Semiconductor, Inc.
Deselected with E
tH
tH
Q
3
A
tKQX
tHZ
2

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