AM29BL802C SPANSION [SPANSION], AM29BL802C Datasheet
AM29BL802C
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AM29BL802C Summary of contents
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Data Sheet The following document contains information on Spansion memory products. Although the document is marked with the name of the company that originally developed the specification, Spansion will continue to offer these products to existing customers. Continuity of Specifications ...
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... DATA SHEET Am29BL802C 8 Megabit (512 K x 16-Bit) CMOS 3.0 Volt-only Burst Mode Flash Memory DISTINCTIVE CHARACTERISTICS ■ 32 words sequential with wrap around (linear 32), bottom boot ■ One 8 Kword, two 4 Kword, one 48 Kword, three 64 Kword, and two 128 Kword sectors ■ Single power supply operation — ...
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... GENERAL DESCRIPTION The Am29BL802C Mbit, 3.0 Volt-only burst mode Flash memory devices organized as 524, 288 words. The device is offered in a 56-pin SSOP package. These devices are designed to be pro- grammed in-system with the standard system 3.0-volt V supply. A 12.0-volt for program or erase operations. The device can also be programmed in standard EPROM programmers ...
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... Automatic Sleep Mode ........................................................... 10 RESET#: Hardware Reset Pin ............................................... 10 Output Disable Mode .............................................................. 11 Table 2. Sector Address Table ........................................................11 Autoselect Mode..................................................................... 12 Table 3. Am29BL802C Autoselect Codes (High Voltage Method) ..12 Sector Protection/Unprotection ............................................... 12 Figure 1. In-system Sector Protect/Unprotect Algorithms ............... 13 Temporary Sector Unprotect .................................................. 14 Figure 2. Temporary Sector Unprotect Operation........................... 14 Hardware Data Protection . . . . . . . . . . . . . . . . . . 14 Low V Write Inhibit ...
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... Counter =3.0–3 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic A3, A4 Y-Decoder STB X-Decoder A0–A2 Am29BL802C Am29BL802C 65R 70R 90R 120R 120 120 DQ0– ...
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... BAA# November 3, 2006 22371C7 56-Pin SSOP Am29BL802C 56 LBA A10 49 A11 48 A12 47 A13 46 A14 45 A15 44 A16 ...
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... Hardware reset input Note: The address, data, and control signals (RY/BY#, LBA, BAA, IND, RESET, OE#, CE#, and WE#) are 5 V tolerant. LOGIC SYMBOL 19 A0–A18 CLK CE# OE# WE# RESET# LBA# BAA# Am29BL802C ns of burst access time after the 16 DQ0–DQ15 IND# RY/BY# 22371C7 November 3, 2006 ...
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... Megabit (512 K x 16-Bit) CMOS High Performance Burst Mode Flash Memory 3.0 Volt-only Read, Program, and Erase Valid Combinations Am29BL802CB-65R ZI, ZE, ZF, ZK Am29BL802CB-70R ZI, ZE, ZF, ZK Am29BL802CB-90R ZI, ZE, ZF, ZK Am29BL802CB-120R ZI, ZE, ZF, ZK For information on full voltage range options (2.7–3.6 V), please contact AMD. November 3, 2006 22371C7 TEMPERATURE RANGE ° ...
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... Sector Address Don’t care. Am29BL802C Addresses Data LBA# BAA# (Note 1) (DQ0–DQ15 OUT HIGH HIGH Z HIGH HIGH Z ...
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... BAA# is high, the device will continue to output that word of data. Asserting both OE# and BAA# low resumes the burst operation, and on the next rising edge of CLK, increments the counter and outputs the next word of data. Am29BL802C ) from the rising edge of the IACC after BACC ...
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... RY/BY# pin remains a “0” (busy) until the inter- nal reset operation is complete, which requires a time of t (during Embedded Algorithms). The system can READY thus monitor RY/BY# to determine whether the reset op- eration is complete. If RESET# is asserted when a pro- Am29BL802C ± 0 but not within IH ) for read access when the de- CE ...
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... Am29BL802C , output from the device is IH Sector Size Address Range 8 Kwords 00000h–01FFFh 4 Kwords 02000h–02FFFh 4 Kwords 03000h–03FFFh 48 Kwords 04000h–0FFFFh 64 Kwords 10000h–1FFFFh 64 Kwords 20000h–2FFFFh 64 Kwords 30000h–3FFFFh 128 Kwords 40000h– ...
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... When using programming equipment, the autoselect mode requires V (11 12 address pin ID A9. Address pins A6, A1, and A0 must be as shown in Table 3. Am29BL802C Autoselect Codes (High Voltage Method) Description CE# Manufacturer ID: AMD L Device ID: Am29BL802CB ...
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... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Unprotect Algorithm Am29BL802C START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes No All sectors protected? Yes ...
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... See “Erase Suspend/Erase Resume Commands” for more information on this mode. The system must issue the reset command to re-en- able the device for reading array data if DQ5 goes high, Am29BL802C power-up and CC Write Inhibit is less than V ...
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... The device will also exit the burst mode if powered down or if RESET# is asserted. The device will not exit the burst mode if the reset command is written. Step 2 Step IACC Am29BL802C Parameters BACC ...
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... The system can deter- mine the status of the program operation by using DQ7, DQ6, or RY/BY#. See “Write Operation Status” for in- formation on these status bits. Am29BL802C ...
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... Erase algorithm are ignored. Note that a hardware reset during the chip erase operation immediately ter- minates the operation. The Chip Erase command se- quence should be reinitiated once the device has returned to reading array data, to ensure data integrity. Am29BL802C START Write Program Command Sequence Data Poll ...
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... Asynchronous Mode The Erase Suspend command is only valid when the Flash device is in Asynchronous Mode. During Erase Suspend operation Asynchronous read/program oper- ations behave normally in non-erasing sectors. How- ever, Erase Suspend operation prevents the Flash Am29BL802C Embedded Erase algorithm in progress Yes ...
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... The system must write the Erase Resume command (address bits are “don’t care”) to exit the erase suspend mode and continue the sector erase operation. Further writes of the Resume command are ignored. Another Erase Suspend command can be written after the de- vice has resumed erasing. Am29BL802C 19 ...
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... Command Definitions Table 4. Am29BL802C Command Definitions Command Sequence (Note 1) Read (Note 6) Reset (Note 7) Manufacturer ID Device ID, Bottom Boot Block Sector Protect Verify (Note 9) Burst Mode Status (Note 10) Program Unlock Bypass Unlock Bypass Program (Note 11) Unlock Bypass Reset (Note 12) Chip Erase Sector Erase ...
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... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 7. Data# Polling Algorithm Am29BL802C Yes Yes PASS 21 ...
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... DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or erase operation still toggling, the device did not complete the operation successfully, and the system Am29BL802C 22371C7 November 3, 2006 ...
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... Adrdess = VA DQ6 = Toggle? FAIL Notes: 1. Read toggle bit twice to determine whether or not it is toggling. See text. 2. Recheck toggle bit because it may stop toggling as DQ5 changes to “1”. See text. Figure 8. Toggle Bit Algorithm Am29BL802C (Note 1) No Yes Yes (Notes Yes ...
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... DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details Table 5. Write Operation Status DQ7 DQ5 (Note 2) DQ6 (Note 1) DQ7# Toggle 0 0 Toggle toggle 0 Data Data Data DQ7# Toggle 0 Am29BL802C DQ2 DQ3 (Note 2) RY/BY# N/A No toggle 0 1 Toggle 0 N/A Toggle 1 Data Data 1 N/A N/A 0 22371C7 November 3, 2006 ...
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... Operating ranges define those limits between which the func- tionality of the device is guaranteed. November 3, 2006 22371C7 +0.8 V –0.5 V –2.0 V Figure 9. Maximum Negative Overshoot Waveform +2 +0 Figure 10. Maximum Positive Overshoot Waveform Am29BL802C ...
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... CC min – 2 min – 100 µ min CC . Typical max Am29BL802C Min Typ Max Unit ±1.0 µA 35 µA ±1.0 µ µ µ µ µA ...
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... Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note °C November 3, 2006 22371C7 1500 2000 2500 Time Frequency in MHz Figure 12. Typical I vs. Frequency CC1 Am29BL802C 3000 3500 4000 3 ...
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... Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Am29BL802C 65R, 90R, 70R 120R Unit 1 TTL gate L 30 100 0.0– ...
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... Test Setup Min CE Max OE OE Max IL Max Max Max Read Min Toggle and Min Data# Polling Min Am29BL802C Speed Options and Temperature Ranges 65R 70R 90R 120R Unit 120 120 ...
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... Speed Options and Temperature Ranges 65R I E Max 65 Max 17 18 Min Min Min Min Max Min Min Max 17 18 Max 20 Min 20 Min Am29BL802C 70R 90R 120R Unit 70 90 120 ...
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... November 3, 2006 22371C7 Addresses Stable t ACC OEH t CE HIGH Z t CES t t BAAS LBAH t BAAH t BDH t BACC IACC t OE Figure 16. Burst Mode Read Am29BL802C HIGH Z Output Valid t CEZ OEZ 31 ...
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... Max Max Min Min Min Min Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 17. RESET# Timings Am29BL802C All Speed Options Unit 20 µs 500 ns 500 µ 22371C7 November 3, 2006 ...
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... November 3, 2006 22371C7 Speed Options 65R 70R Min 65 Min Min 45 Min 35 Min Min Min Min Min Min 35 Min Typ Typ Min Min Max Am29BL802C 90R 120R Unit 70 90 120 ...
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... WPH A0h t BUSY is the true data at the program address. OUT Figure 18. Program Operation Timings Am29BL802C Read Status Data (last two cycles WHWH1 Status D OUT t RB 22371C7 November 3, 2006 ...
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... Note sector address (for Sector Erase Valid Address for reading status data (see “Write Operation Status”). Figure 19. Chip/Sector Erase Operation Timings November 3, 2006 22371C7 555h for chip erase WPH t DH 55h 30h 10 for Chip Erase t BUSY Am29BL802C Read Status Data WHWH2 In Complete Progress ...
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... Complement Complement True Status Data Status Data Valid Status Valid Status (first read) (second read) Am29BL802C VA High Z Valid Data High Z True Valid Data VA VA Valid Status Valid Data (stops toggling) 22371C7 November 3, 2006 ...
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... Figure 23. Temporary Sector Unprotect Timing Diagram November 3, 2006 22371C7 Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Min Min Program or Erase Command Sequence t RSP Am29BL802C Erase Resume Erase Erase Complete Read All Speed Options Unit 500 4 t VIDR ns µs 37 ...
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... Note: For sector protect For sector unprotect Figure 24. Sector Protect/Unprotect Timing Diagram Valid* Valid* Verify 60h Sector Protect: 150 µs Sector Unprotect Am29BL802C Valid* 40h Status 22371C7 November 3, 2006 ...
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... See the “Erase and Programming Performance” section for more information. November 3, 2006 22371C7 65R Min 65 Min Min 45 Min 35 Min Min Min Min Min Min 35 Min Typ Typ Am29BL802C Speed Options 70R 90R 120R Unit 70 90 120 ...
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... SA for sector erase 555 for chip erase Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase Am29BL802C PA DQ7# D OUT = data written to the OUT 22371C7 November 3, 2006 ...
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... V –1.0 V –100 mA = 3.0 V, one pin at a time. CC Test Setup OUT V IN Test Conditions 150°C 125°C Am29BL802C Unit Comments s Excludes 00h programming prior to erasure (Note 4) s Excludes system level µs overhead (Note 100,000 cycles. Additionally, CC Min Max 12 ...
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... PHYSICAL DIMENSIONS* SSO056—56-Pin Shrink Small Outline Package Am29BL802C Dwg rev AB; 10/99 22371C7 November 3, 2006 ...
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... Sequence Noted that only asynchronous reads are allowed during the erase suspend mode, added asynchronous mode and burst mode section. Am29BL802C for the 65R speed option in the indus- and t for the 65R speed option in the DF ...
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... Ordering Information °C. Changed Extended temperature range to -40°C. °C. Revision C7 (November 3, 2006) Sector Protection/Unprotection Corrected reference to programming supplement pub- lication number and location. °C. Erase and Program Operations table Changed maximum specification. BUSY Am29BL802C . 22371C7 November 3, 2006 ...