NH82801GBM SL8YB Intel Corporation, NH82801GBM SL8YB Datasheet - Page 705

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NH82801GBM SL8YB

Manufacturer Part Number
NH82801GBM SL8YB
Description
Manufacturer
Intel Corporation
Datasheet

Specifications of NH82801GBM SL8YB

Case
BGA
Date_code
07+
Intel® High Definition Audio Controller Registers (D27:F0)
®
19
Intel
High Definition Audio
Controller Registers (D27:F0)
®
The Intel
High Definition Audio controller resides in PCI Device 27, Function 0 on bus
0. This function contains a set of DMA engines that are used to move samples of
digitally encoded data between system memory and external codecs.
Note:
All registers in this function (including memory-mapped registers) must be addressable
in byte, word, and D-word quantities. The software must always make register
accesses on natural boundaries (i.e. D-word accesses must be on D-word boundaries;
word accesses on word boundaries, etc.) In addition, the memory-mapped register
space must not be accessed with the LOCK semantic exclusive-access mechanism. If
software attempts exclusive-access mechanisms to the Intel High Definition Audio
memory-mapped space, the results are undefined.
Note:
Users interested in providing feedback on the Intel High Definition Audio specification
or planning to implement the Intel High Definition Audio specification into a future
product will need to execute the Intel
Agreement. For more information, contact nextgenaudio@intel.com.
®
19.1
Intel
High Definition Audio PCI Configuration
Space (Intel
Note:
Address locations that are not shown should be treated as Reserved.
Table 19-1. Intel
High Definition Audio PCI Register Address Map
®
(Intel
High Definition Audio D27:F0) (Sheet 1 of 2)
®
Offset
Mnemonic
00h–01h
VID
02h–03h
DID
04h–05h
PCICMD
06h–07h
PCISTS
08h
RID
09h
0Ah
SCC
0Bh
BCC
0Ch
CLS
0Dh
0Eh
HEADTYP
10h–13h
HDBARL
14h–17h
HDBARU
2Ch–2Dh
SVID
2Eh–2Fh
SID
34h
CAPPTR
®
Intel
ICH7 Family Datasheet
®
High Definition Audio Specification Developer’s
®
High Definition Audio— D27:F0)
Register Name
Vendor Identification
Device Identification
PCI Command
PCI Status
Revision Identification
PI
Programming Interface
Sub Class Code
Base Class Code
Cache Line Size
LT
Latency Timer
Header Type
®
Intel
High Definition Audio Lower Base
Address (Memory)
Intel® High Definition Audio Upper Base
Address (Memory)
Subsystem Vendor Identification
Subsystem Identification
Capability List Pointer
Default
Access
8086h
RO
See register
RO
description.
0000h
R/W, RO
0010h
R/WC, RO
See register
RO
description.
00h
RO
03h
RO
04h
RO
00h
R/W
00h
RO
00h
RO
00000004h
R/W, RO
00000000h
R/W
0000h
R/WO
0000h
R/WO
50h
RO
705

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