ATMEGA8515L8AU

Manufacturer Part NumberATMEGA8515L8AU
DescriptionTQFP44
ManufacturerATMEL Corporation
ATMEGA8515L8AU datasheet
 

Specifications of ATMEGA8515L8AU

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Timer/Counter1 Control
Register B – TCCR1B
ATmega8515(L)
122
Bit
7
6
5
ICNC1
ICES1
Read/Write
R/W
R/W
R
Initial Value
0
0
0
• Bit 7 – ICNC1: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the Noise
Canceler is activated, the input from the Input Capture Pin (ICP1) is filtered. The filter
function requires four successive equal valued samples of the ICP1 pin for changing its
output. The Input Capture is therefore delayed by four Oscillator cycles when the noise
canceler is enabled.
• Bit 6 – ICES1: Input Capture Edge Select
This bit selects which edge on the Input Capture Pin (ICP1) that is used to trigger a cap-
ture event. When the ICES1 bit is written to zero, a falling (negative) edge is used as
trigger, and when the ICES1 bit is written to one, a rising (positive) edge will trigger the
capture.
When a capture is triggered according to the ICES1 setting, the counter value is copied
into the Input Capture Register (ICR1). The event will also set the Input Capture Flag
(ICF1), and this can be used to cause an Input Capture Interrupt, if this interrupt is
enabled.
When the ICR1 is used as TOP value (see description of the WGM13:0 bits located in
the TCCR1A and the TCCR1B Register), the ICP1 is disconnected and consequently
the Input Capture function is disabled.
• Bit 5: Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit
must be written to zero when TCCR1B is written.
• Bit 4:3 – WGM13:2: Waveform Generation Mode
See TCCR1A Register description.
• Bit 2:0 – CS12:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
Figure 56 and Figure 57.
Table 54. Clock Select Bit Description
CS12
CS11
CS10
Description
0
0
0
No clock source (Timer/counter stopped).
0
0
1
clk
/1 (No prescaling)
I/O
0
1
0
clk
/8 (From prescaler)
I/O
0
1
1
clk
/64 (From prescaler)
I/O
1
0
0
clk
/256 (From prescaler)
I/O
1
0
1
clk
/1024 (From prescaler)
I/O
1
1
0
External clock source on T1 pin. Clock on falling edge.
1
1
1
External clock source on T1 pin. Clock on rising edge.
If external pin modes are used for the Timer/Counter1, transitions on the T1 pin will
clock the counter even if the pin is configured as an output. This feature allows software
control of the counting.
4
3
2
1
WGM13
WGM12
CS12
CS11
CS10
R/W
R/W
R/W
R/W
0
0
0
0
0
TCCR1B
R/W
0
2512J–AVR–10/06