CY7C19425PC Cypress Semiconductor Corporation., CY7C19425PC Datasheet
CY7C19425PC
Manufacturer Part Number
CY7C19425PC
Description
DIP24
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY7C19420PC.pdf
(12 pages)
96
Cypress Semiconductor Corporation
Document #: 38-05162 Rev. **
Features
Functional Description
The CY7C194, CY7C195, and CY7C196 are high-perfor-
mance CMOS static RAMs organized as 65,536 by 4 bits.
Easy memory expansion is provided by active LOW Chip En-
Selection Guide
• High speed
• Output enable (OE) feature (7C195 and 7C196)
• CMOS for optimum speed/power
• Low active power
• Low standby power
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
A
Logic Block Diagram
A
A
A
A
A
A
A
A
A
10
— 12 ns
— 880 mW
— 220 mW
1
2
3
4
5
6
7
8
9
INPUT BUFFER
1024 x 64 x 4
DECODER
COLUMN
ARRAY
POWER
DOWN
•
7C194-12
7C195-12
7C196-12
155
3901 North First Street
12
30
C194-1
I/O
I/O
I/O
I/O
CE
CE
WE
(OE)
(7C195 and
7C196 ONLY)
7C194-15
7C195-15
7C196-15
3
2
1
0
2
1
(7C196 only)
145
15
30
able(s) (CE on the CY7C194 and CY7C195, CE
CY7C196) and three-state drivers. They have an automatic
power-down feature, reducing the power consumption by 75%
when deselected.
Writing to the device is accomplished when the Chip Enable(s)
(CE on the CY7C194 and CY7C195, CE
CY7C196) and Write Enable (WE) inputs are both LOW. Data
on the four input pins (I/O
memory location, specified on the address pins (A
A
Reading the device is accomplished by taking the Chip En-
able(s) (CE on the CY7C194 and CY7C195, CE
CY7C196) LOW, while Write Enable (WE) remains HIGH. Un-
der these conditions the contents of the memory location
specified on the address pins will appear on the four data I/O
pins.
A die coat is used to ensure alpha immunity.
15
Pin Configurations
).
GND
CE
A
A
A
A
A
A
A
A
A
A
10
11
12
13
14
15
7C194-20
7C195-20
7C196-20
6
7
8
9
•
10
11
12
135
1
2
3
4
5
6
7
8
9
DIP/SOJ
Top View
20
30
7C194
San Jose
24
23
22
21
20
19
18
17
16
15
14
13
C194-2
V
A
A
A
A
A
I/O
I/O
I/O
I/O
WE
7C194-25
7C195-25
7C196-25
A
CC
4
3
2
1
0
5
64K x 4 Static RAM
3
2
1
0
115
25
30
•
0
CA 95134
through I/O
CE
GND
OE
A
A
A
A
A
A
NC
A
A
A
A
10
11
12
13
14
15
1
Revised September 18, 2001
6
7
8
9
7C194-35
7C195-35
7C196-35
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DIP/SOJ
Top View
7C195
7C196
115
35
30
3
) is written into the
28
27
26
25
24
23
22
21
20
19
18
17
16
15
•
CY7C194
CY7C195
CY7C196
1
NC
V
A
A
A
A
A
A
I/O
I/O
I/O
I/O
WE
, CE
408-943-2600
C194-3
CC
5
4
3
2
1
0
1
1
3
2
1
0
, CE
, CE
7C194-45
7C196-45
2
0
CE
(7C196)
NC
(7C195)
45
30
2
2
through
2
on the
on the
on the
[+] Feedback
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