MT47H32M16HR25EITGTR Micron Semiconductor Products, MT47H32M16HR25EITGTR Datasheet - Page 7

• Manufacturer Part Number: MT47H32M16HR25EITGTR
• Description: BGA
• Manufacturer: Micron Semiconductor Products

Specifications of MT47H32M16HR25EITGTR

• Date_code: 11+

512Mb: x4, x8, x16 DDR2 SDRAM
Features
Figure 51: Bank Read – Without Auto Precharge .............................................................................................. 99
Figure 52: Bank Read – with Auto Precharge .................................................................................................. 100
t
t
Figure 53: x4, x8 Data Output Timing –
DQSQ,
QH, and Data Valid Window .................................................. 101
t
t
Figure 54: x16 Data Output Timing –
DQSQ,
QH, and Data Valid Window ..................................................... 102
t
t
Figure 55: Data Output Timing –
AC and
DQSCK ......................................................................................... 103
Figure 56: Write Burst ................................................................................................................................... 105
Figure 57: Consecutive WRITE-to-WRITE ...................................................................................................... 106
Figure 58: Nonconsecutive WRITE-to-WRITE ................................................................................................ 106
Figure 59: WRITE Interrupted by WRITE ....................................................................................................... 107
Figure 60: WRITE-to-READ ........................................................................................................................... 108
Figure 61: WRITE-to-PRECHARGE ................................................................................................................ 109
Figure 62: Bank Write – Without Auto Precharge ............................................................................................ 110
Figure 63: Bank Write – with Auto Precharge .................................................................................................. 111
Figure 64: WRITE – DM Operation ................................................................................................................ 112
Figure 65: Data Input Timing ........................................................................................................................ 113
Figure 66: Refresh Mode ............................................................................................................................... 114
Figure 67: Self Refresh .................................................................................................................................. 116
Figure 68: Power-Down ................................................................................................................................ 118
Figure 69: READ-to-Power-Down or Self Refresh Entry .................................................................................. 120
Figure 70: READ with Auto Precharge-to-Power-Down or Self Refresh Entry ................................................... 120
Figure 71: WRITE-to-Power-Down or Self Refresh Entry ................................................................................. 121
Figure 72: WRITE with Auto Precharge-to-Power-Down or Self Refresh Entry .................................................. 121
Figure 73: REFRESH Command-to-Power-Down Entry .................................................................................. 122
Figure 74: ACTIVATE Command-to-Power-Down Entry ................................................................................. 122
Figure 75: PRECHARGE Command-to-Power-Down Entry ............................................................................. 123
Figure 76: LOAD MODE Command-to-Power-Down Entry ............................................................................. 123
Figure 77: Input Clock Frequency Change During Precharge Power-Down Mode ............................................ 124
Figure 78: RESET Function ........................................................................................................................... 126
Figure 79: ODT Timing for Entering and Exiting Power-Down Mode ............................................................... 128
Figure 80: Timing for MRS Command to ODT Update Delay .......................................................................... 129
Figure 81: ODT Timing for Active or Fast-Exit Power-Down Mode .................................................................. 129
Figure 82: ODT Timing for Slow-Exit or Precharge Power-Down Modes .......................................................... 130
Figure 83: ODT Turn-Off Timings When Entering Power-Down Mode ............................................................ 130
Figure 84: ODT Turn-On Timing When Entering Power-Down Mode .............................................................. 131
Figure 85: ODT Turn-Off Timing When Exiting Power-Down Mode ................................................................ 132
Figure 86: ODT Turn-On Timing When Exiting Power-Down Mode ................................................................. 133
PDF: 09005aef82f1e6e2
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512MbDDR2.pdf - Rev. T 2/12 EN
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