74LVT373MTC Fairchild Semiconductor, 74LVT373MTC Datasheet

IC LATCH TRANSP OCT 3ST 20TSSOP

74LVT373MTC

Manufacturer Part Number
74LVT373MTC
Description
IC LATCH TRANSP OCT 3ST 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LVTr
Datasheets

Specifications of 74LVT373MTC

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2.7 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
1.5ns
Current - Output High, Low
32mA, 64mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Latch Type
Transparent
Output Current
64mA
Propagation Delay
4.5ns
No. Of Bits
8
Ic Output Type
Tri State Non Inverted
Supply Voltage Range
2.7V To 3.6V
Logic Case Style
TSSOP
No. Of Pins
20
Rohs Compliant
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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© 1999 Fairchild Semiconductor Corporation
74LVT373WM
74LVT373SJ
74LVT373MTC
74LVTH373WM
74LVTH373SJ
74LVTH373MTC
74LVT373 • 74LVTH373
Low Voltage Octal Transparent Latch
with 3-STATE Outputs
General Description
The LVT373 and LVTH373 consist of eight latches with
3-STATE outputs for bus organized system applications.
The latches appear transparent to the data when Latch
Enable (LE) is HIGH. When LE is LOW, the data satisfying
the input timing requirements is latched. Data appears on
the bus when the Output Enable (OE) is LOW. When OE is
HIGH, the bus output is in a high impedance state.
The LVTH373 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
These octal latches are designed for low-voltage (3.3V)
V
interface to a 5V environment. The LVT373 and LVTH373
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining low power dissipation.
Ordering Code:
Logic Symbols
Order Number
CC
applications, but with the capability to provide a TTL
Package Number
MTC20
MTC20
M20D
M20B
M20D
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
DS012015
Features
Input and output interface capability to systems at
5V V
Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH373), also
available without bushold feature (74LVT373).
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink 32 mA/ 64 mA
Functionally compatible with the 74 series 373
Package Description
CC
IEEE/IEC
September 1999
Revised October 1999
www.fairchildsemi.com

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74LVT373MTC Summary of contents

Page 1

... M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 74LVT373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVT373MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVTH373WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide ...

Page 2

Connection Diagram Functional Description The LVT373 and LVTH373 contain eight D-type latches with 3-STATE standard outputs. When the Latch Enable (LE) input is HIGH, data on the D inputs enters the n latches. In this condition the latches are transparent, ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current Supply Current ...

Page 4

DC Electrical Characteristics Symbol Parameter V Input Clamp Diode Voltage IK V Input HIGH Voltage IH V Input LOW Voltage IL V Output HIGH Voltage OH V Output LOW Voltage OL I Bushold Input Minimum Drive I(HOLD) (Note 4) I ...

Page 5

AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL PLH Propagation Delay PHL PLH n t Output Enable Time PZL t PZH t Output Disable Time PLZ t PHZ ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20B Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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