74LVT373MTC Fairchild Semiconductor, 74LVT373MTC Datasheet - Page 2

• Manufacturer Part Number: 74LVT373MTC
• Description: IC LATCH TRANSP OCT 3ST 20TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74LVTr

Specifications of 74LVT373MTC

• Logic Type: D-Type Transparent Latch
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 2.7 V ~ 3.6 V
• Independent Circuits: 1
• Delay Time - Propagation: 1.5ns
• Current - Output High, Low: 32mA, 64mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Latch Type: Transparent
• Output Current: 64mA
• Propagation Delay: 4.5ns
• No. Of Bits: 8
• Ic Output Type: Tri State Non Inverted
• Supply Voltage Range: 2.7V To 3.6V
• Logic Case Style: TSSOP
• No. Of Pins: 20
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Connection Diagram
Functional Description
The LVT373 and LVTH373 contain eight D-type latches
with 3-STATE standard outputs. When the Latch Enable
(LE) input is HIGH, data on the D
latches. In this condition the latches are transparent, i.e., a
latch output will change state each time its D input
changes. When LE is LOW, the latches store the informa-
tion that was present on the D inputs a setup time preced-
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
n
inputs enters the
2
Pin Descriptions
Truth Table
H
L
Z
X
O
ing the HIGH-to-LOW transition of LE. The 3-STATE
standard outputs are controlled by the Output Enable (OE)
input. When OE is LOW, the standard outputs are in the 2-
state mode. When OE is HIGH, the standard outputs are in
the high impedance mode but this does not interfere with
entering new data into the latches.
0
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial
Previous O
D
LE
OE
O
0
0
Pin Names
–D
–O
LE
X
H
H
L
7
7
0
before HIGH-to-LOW transition of Latch Enable
Inputs
OE
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
H
L
L
L
Description
D
X
H
X
L
n
Outputs
O
O
Z
H
L
n
0