ADF4151BCPZ Analog Devices, ADF4151BCPZ Datasheet

ADF4151BCPZ

Manufacturer Part Number

ADF4151BCPZ

Description

Manufacturer

Analog Devices

Datasheet

1.ADF4151BCPZ.pdf (28 pages)

Specifications of ADF4151BCPZ

Pack_quantity

490

Comm_code

85423990

Lead_time

Eccn

EAR99

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Data Sheet

FEATURES

Fractional-N synthesizer and integer-N synthesizer

RF bandwidth to 3.5 GHz

3.0 V to 3.6 V power supply

1.8 V logic compatibility

Separate charge pump supply (V

Programmable dual-modulus prescaler of 4/5 or 8/9

Programmable RF output phase

3-wire serial interface

Analog and digital lock detect

Switched bandwidth fast lock mode

Cycle slip reduction

APPLICATIONS

Wireless infrastructure (W-CDMA, TD-SCDMA, WiMax, GSM,

Test equipment

Wireless LANs, CATV equipment

Clock generation

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

voltage (up to 5.5 V) in 3 V systems

PCS, DCS, DECT)

REF

DATA

CLK

–

DOUBLER

×2

DATA REGISTER

N COUNTER

INTEGER

REG

SDV

) allows extended tuning

COUNTER

10-BIT R

FRACTION

REG

INTERPOLATOR

THIRD-ORDER

FRACTIONAL

MODULUS

DIVIDER

FUNCTIONAL BLOCK DIAGRAM

REG

÷2

FUNCTION

Fractional-N/Integer-N PLL Synthesizer

LATCH

Figure 1.

DETECT

LOCK

COMPARATOR

PHASE

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

GENERAL DESCRIPTION

The

integer-N phase-locked loop (PLL) frequency synthesizers

if used with an external voltage controlled oscillator (VCO),

loop filter, and external reference frequency.

The

and software compatible with the ADF4350. The part consists

of a low noise digital phase frequency detector (PFD), a precision

charge pump, and a programmable reference divider. There is

a Σ-Δ based fractional interpolator to allow programmable

fractional-N division. The INT, FRAC, and MOD registers

define an overall N divider [N = (INT + (FRAC/MOD))]. The

RF output phase is programmable for applications that require

a particular phase relationship between the output and the

reference. The

circuitry, leading to faster lock times without the need for

modifications to the loop filter.

Control of all the on-chip registers is through a simple 3-wire

interface. The device operates with a power supply ranging

from 3.0 V to 3.6 V that can be powered down when not in use.

The

GND

ADF4151

MULTIPLEXER

CHARGE

SET

GND

PUMP

allows implementation of fractional-N or

is used with external VCO parts and is footprint

is available in a 5 mm × 5 mm package.

ADF4151

GND

also features cycle slip reduction

SWITCH

ADF4151

www.analog.com

MUXOUT

OUT

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