MSM9005-XX OKI [OKI electronic componets], MSM9005-XX Datasheet
MSM9005-XX
Related parts for MSM9005-XX
MSM9005-XX Summary of contents
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... DOT MATRIX LCD CONTROLLER WITH 8-DOT COMMON DRIVER AND 65-DOT SEGMENT DRIVER GENERAL DESCRIPTION The MSM9005- controller/driver which displays 13 alphanumerics and symbols (5x7 dots) and 65 arbitrators on a dot matrix LCD panel that has 8 common inputs and 65 segment inputs. Command and display data are written by 8-bit serial transfer. ...
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OSC1 Timing OSC OSC2 generator OSC3 RST 5 Address pointer C/D 5 SHT TEST1 5 TEST2 TEST3 Character CG ROM address 8 generator RAM (CG ...
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... connection 100-Pin Plastic QFP FEDL9005-03 MSM9005- S38 79 S39 78 S40 77 S41 76 S42 75 S43 74 S44 73 S45 72 S46 71 S47 70 S48 69 S49 68 S50 67 S51 66 S52 65 S53 64 S54 ...
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... Setting this pin at the "L" level resets to initial status. Test signal inputs. Set these pins to the same potential as V unconnected. An error may occur by another setting. — Pins for an 80 kHz RC oscillation circuit. Connect resistors and a capacitor as shown below. 10kW OSC1 — 56pF OSC2 62±10kW OSC2 FEDL9005-03 MSM9005- 4/30 ...
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... These are bias power pins for driving the LCD. Set the bias voltage as follows £ V – V £ LCD4 1 — – (V –V LCD1 DD DD LCD4 – (V –V LCD2 DD DD LCD4 – (V –V LCD3 DD DD LCD4 4 FEDL9005-03 MSM9005-xx = 2.5 to 5.5V and 5/30 ...
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... Condition * — — and V LCD1 LCD2 LCD3 ) )= FEDL9005-03 MSM9005-xx Rating Unit –0 – +0 –0 +0 –0 +0 620 mW –55 to +150 C Range Unit 2 –8 –4.0 ...
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... I =+/–10mA — =2.5V –8V — f =80kHz OSC (External resistor, capacitor) C=56pF, R =10kW, — S R=66kW FEDL9005-03 MSM9005-xx =(V –8V –4V Typ. Max. Unit Applicable pin Input pins other — than OSC1 — OSC1 DD Input pins other — ...
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... I =+/–10mA — =5.5V –8V — f =80kHz OSC (External resistor, capacitor) C=56pF, R =10kW, — S R=66kW FEDL9005-03 MSM9005-xx =(V –8V –4V Typ. Max. Unit Applicable pin Input pins other — than OSC1 — OSC1 DD Input pins other — ...
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... IS t — All inputs — — rDLY f — SHT t — SHT SHT FEDL9005-03 MSM9005-xx =(V –8V –4V Min. Typ. Max. Unit 300 — — ns 200 — — ns 500 — — ns — — 200 ns — — ...
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... S15 S16 S20 S21 S25 S26 S30 S31 S35 S36 S40 S41 10011b 10100b 10101b 10110b 10111b 00011b 00100b 00101b 00110b 00111b FEDL9005-03 MSM9005- S45 S46 S50 S51 S55 S56 S60 S61 S65 11000b 11001b 11010b 11011b ...
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... When all on ´ character blink Increments address pointer value Sets additional function of AINC command Set SO pin SO pin is a CMOS output when S = "1" pin high impedance state when S = "0" OSC FEDL9005-03 MSM9005-xx Comment ). 11/30 ...
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... LSB C7: CG ROM address Relationship between RD0 to RD4 and segment pins is as follows RD4 RD3 RD2 RD1 RD0 FEDL9005-03 MSM9005-xx Comment S5n+1 S5n+5 AB4 AB0 Comment S5n+1 S5n+5 RD4 ...
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... WAIT WAIT 21 x 1/f OSC OSC Don't Care 00h LSB MSB LSB CG ROM code data FEDL9005-03 MSM9005-xx is required OSC t CH Don't Care 01h 02h MSB LSB CG ROM code data at the next address 13/30 ...
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... Don't Care AINC command RD4 RD3 RD2 RD1 MSB LSB MSB Display data at address 00h of CGA RAM FEDL9005-03 MSM9005-xx is required OSC Don't Care AINC command 01h RD4 RD3 RD2 RD1 LSB Display data at address ...
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... Arbitrator blink ............... Writing in 5 dot units is set. Character blink ................ Repeat of all display-on and character display is set. Display on and all display off ................... All display off mode is selected. Segment output ............... All segment outputs Common output.............. All common outputs pin ............................... High impedance state FEDL9005-03 MSM9005-xx level. DD level. DD 15/30 ...
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... After this data transfer is executed, the address pointer value becomes 03H. CG ROM code data is written to CGA RAM address 0BH, and the character corresponding to the specified CG ROM code can be displayed at segments 56 to 60. After this data transfer is executed, the address pointer value becomes 0CH. FEDL9005-03 MSM9005-xx 16/30 ...
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... CG ROM code can be displayed at segments 61 to 65. After this data transfer is executed, the address pointer value becomes 0DH. CGA RAM address is only 00H to 0CH. The address pointer value becomes 0DH. However, this CG ROM data is ignored. FEDL9005-03 MSM9005-xx 17/30 ...
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... Arbitrator display data is written to AB RAM address 1CH, and the specified arbitrator of segments can be displayed. After this data transfer is executed, the address pointer value becomes 1DH. AB RAM address is only 10H to 1CH. The address pointer value becomes 1DH. However, this arbitrator display data is ignored. FEDL9005-03 MSM9005-xx 18/30 ...
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... Set the address pointer value by the LPA command before executing this command. Transfer the LPA command, ABBC 1/5 command and CHB command as follows. Display-off mode is set when DI = “0” Display-on mode is set when DI = “1” "0" enables writing in 5-bit unit "1" enables writing in 1-bit unit. FEDL9005-03 MSM9005-xx 19/30 ...
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... CB value is written to CHB RAM address 0CH, and the blinking of characters displayed in segments set. After this command is executed, the address pointer value becomes 0DH CHB RAM address is only 00H to 0CH. The address pointer value becomes 0DH. However, this CHB command is ignored. FEDL9005-03 MSM9005-xx 20/30 ...
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... CB value is written to ABB RAM address 1CH and the blinking of arbitrator displayed in segments set. After this command is executed, the address pointer value becomes 1DH ABB RAM address is only 10H to 1CH. The address pointer value becomes 1DH. However, this CHB command is ignored. FEDL9005-03 MSM9005-xx 21/30 ...
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... After this command is executed, the address pointer value becomes 12H. Arbitrator blink data is written to ABB RAM address 1BH, and the arbitrator specified in segments starts blinking. After this command is executed, the address pointer value becomes 1CH. FEDL9005-03 MSM9005-xx 22/30 ...
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... Arbitrator blink data is written to ABB RAM address 1CH, and the arbitrator specified in segment starts blinking. After this command is executed, the address pointer value becomes 1DH. ABB RAM address is only 10H to 1CH. The address pointer value becomes 1DH. However, this ABB command is ignored. FEDL9005-03 MSM9005-xx 23/30 ...
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... I0 and I1 can be set independently "1" and I1 = "1" are set, "0" is written to all CG RAM, AB RAM, CHB RAM and ABB RAM. [LOT Command Format Don't care FEDL9005-03 MSM9005-xx When BP = "0" 24/30 ...
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... This command is used to select the output impedance of the SO pin. When S = "1" is selected, the S0 pin becomes CMOS output and it outputs displays data. While S = "0" is selected, the S0 pin becomes high impedance status. [SOE/D Command Format Don't care FEDL9005-03 MSM9005-xx 25/30 ...
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... CHB command Arbitrator display data writing NO Writing end Writing end YES YES Other RAM setting NO BPC command DISP command Note: Normal operation status (display ON) End FEDL9005-03 MSM9005-xx ABB1/5 command ABB command Address is automatically incremented Arbitrator blink data writing NO Writing end YES 26/30 ...
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... Semiconductor MSM9005-01 CG ROM Code MSB 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 LSB 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 FEDL9005-03 MSM9005-xx 27/30 ...
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... Semiconductor REFERENCE DATA Oscillation Circuit Characteristics RC oscillation characteristics 140 120 100 2.5 3.0 3.5 4.0 RC oscillation characteristics 200 150 100 50 0 2.5 3.0 3.5 4.0 (R=65.5kW fixed) 4.5 5.0 5.5 6.0 V (V) DD (C=56.6pF fixed) 4.5 5.0 5.5 6.0 V (V) DD FEDL9005-03 MSM9005-xx C=29.4pF C=56.6pF C=121pF 6.5 R=26.6kW R=65.5kW R=104kW 6.5 28/30 ...
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... Package material Epoxy resin Lead frame material 42 alloy Pin treatment Solder plating (≥5 mm) Package weight (g) 1.29 TYP. Rev. No./Last Revised 4/Nov. 28, 1996 FEDL9005-03 MSM9005-xx (Unit : mm) 29/30 ...
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... No part of the contents contained herein may be reprinted or reproduced without our prior permission. 9. MS-DOS is a registered trademark of Microsoft Corporation. Copyright 2000 Oki Electric Industry Co., Ltd. Printed in Japan FEDL9005-03 MSM9005-xx 30/30 ...