MSM9005-XX OKI [OKI electronic componets], MSM9005-XX Datasheet - Page 13

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MSM9005-XX

Manufacturer Part Number
MSM9005-XX
Description
DOT MATRIX LCD CONTROLLER WITH 8-DOT COMMON DRIVER AND 65-DOT SEGMENT DRIVER
Manufacturer
OKI [OKI electronic componets]
Datasheet
¡ Semiconductor
How to Write Command and Display Data
• Input a command and display data into the SI pin sequentially from MSB in 8-bit units (MSB
• Setting CS pin at "H" level enables transfer of a command and display data.
• Setting CS pin at a "L" level disables data transfer.
• As shown in the figure below, data is shifted at the rising edge of the shift clock that is input
• Loaded 8-bit data is recognized as a command if the C/D pin is set at "H" level, and is
Write timing is shown below.
(Example) Writing CG ROM address data The wait time of 21 1/f
Address
first).
to the SHT pin. When 8 shift clocks are input, internal load signals are automatically generated
and a command or display data is loaded. It is unnecessary to provide load signals externally.
recognized as display data if the C/D pin is set at "L" level on the rising edge of the 8th shift
clock input to the SHT pin.
pointer
SHT
C/D
CS
SI
MSB
1 1 * 0 0 0 0 0
LPA command
(Sets address pointer
to 00h)
Don't Care
21 x 1/f
OSC
LSB
WAIT
C7 C6 C5 C4 C3 C2 C1 C0
MSB
Don't Care
CG ROM code data
00h
21 x 1/f
OSC
LSB
WAIT
C7 C6 C5 C4 C3 C2 C1 C0
MSB
CG ROM code data at
the next address
OSC
Don't Care
is required
01h
FEDL9005-03
MSM9005-xx
t
CH
LSB
13/30
02h

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