MSM7731-02 OKI [OKI electronic componets], MSM7731-02 Datasheet - Page 5

• Manufacturer Part Number: MSM7731-02
• Description: Dual Echo Canceler & Noise Canceler with Dual Codec for Hands-Free
• Manufacturer: OKI [OKI electronic componets]

AGND
This is analog ground pin.
DGND1, DGND2
These are the digital ground pins.
AV
This is the analog +3 V power supply pin.
DV
These are the digital +3 V power supply pins.
SG
This is the output pin for the analog signal ground potential. The output voltage is approximately 1.4 V.
Insert 10 µF and 0.1 µF ceramic bypass capacitors between the AGND and SG pin. At power-down rest, this
output becomes 0 V.
PDN
PDN
PDN
PDN/RST
This is the power-down reset control input pin. If a logic “0” is input to this pin, the device enters the power-down
state. At this time, all control register bits, internal variables, and coefficients of echo cancelers and noise cancelers
will be reset. After the power-down reset state is released, the device enters the initial mode (refer to the CR0
control register description). During normal operation, set this pin to a logic “1”. The PDN/RST pin is ORed
(negative logic) with CR0-B7 of the control register. Refer to the section “RELATIONSHIP BETWEEN PINS
AND CONTROL REGISTERS”.
MCK/X1
This is the master clock input pin. The clock frequency is 19.2 MHz. The input clock may be asynchronous with
respect to the SYNC signal or the BCLK signal. Refer to Figure 2 (a) for an example application of an external
clock and Figure 2 (b) for an example oscillator circuit.
X2
This is the crystal oscillator output pin. If an existing external clock is to be used, leave this pin open and input the
clock to the MCK pin. Refer to Figure 2 (b) for an example oscillator circuit.
Figure 2 (a) External Clock
1 Semiconductor
DD
DD1
RST
RST
RST
, DV
DD2
MCK/X1
Application Example
X2
C
Figure2 (b)
MCK/X1
X’tal
R
Oscillator Circuit
Example
X2
C
X’tal (19.2 MHz)
HC-49/U
CX-91F
10 pF
T.B.D
C
FEDL7731-02-04
MSM7731-02
T.B.D
1 M
R
5/53