92HD66B IDT [Integrated Device Technology], 92HD66B Datasheet - Page 18

• Manufacturer Part Number: 92HD66B
• Description: FOUR CHANNEL HD AUDIO CODECS
• Manufacturer: IDT [Integrated Device Technology]

92HD66B
FOUR CHANNEL HD AUDIO CODECS WITH DUAL CAPLESS HEADPHONE AMPLIFIERS
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
8. PLL remains on if SPDIF_Out Keep Alive is enabled. PLL disabled only after DAC fading is complete and SDM
9. PLL disabled only after DAC fading is complete and SDM has settled.
2.10. AFG D0
2.11. AFG D1
2.12. AFG D2
2.13. AFG D3
Function
Port Presence Detect state change Unsolicited Response
GPIO state change
has settled.
2.13.1. AFG D3cold
The D3-default state is available for HD Audio compliance. The programmable values, exposed via
vendor-specific settings, are under IDT Device Driver control for further power reduction. The analog
mixer, line and headphone amps, port presence detect, and internal references may be disabled
using vendor specific verbs. Use of these vendor specific verbs will cause pops.
The default power state for the Audio Function Group after reset is D3.
The AFG D0 state is the active state for the device. All functions are active if their power state (if they
support power management at their node level) has been set to D0.
D1 is a lower power mode where all converter widgets are disabled. Analog mixer and port functions
are active. The part will resume from theD1 to theD0 state within 1 mS.
The D2 state further reduces power by disabling the mixer and port functions. The port amplifiers
and internal references remain active to keep port coupling caps charged and the system ready for a
quick resume to either the D1 or D0 state. The part will resume from the D2 state to the D0 state
within 2mS.
The D3-default state is available for HD Audio compliance. All converters are shut down. Port ampli-
fiers and references are active but in a low power state to prevent pops. Resume times may be lon-
ger than those from D2, but still less than 10mS to meet Intel low power goals. The default power
state for the Audio Function Group after power is applied is D3.
While in AFG D3, the HD Audio controller may be in a D0 state (HD Audio bus active) or in a D3
state (HD Audio bus held in reset with no Bit_Clk, SData_Out, or Sync activity.) The expected behav-
ior is as follows (see the HDA015-B section for more information):
The D3cold power state is the lowest power state available that does not use vendor specific verbs.
While in D3cold, the CODEC will still respond to bus requests to revert to a higher power state (dou-
ble AFG reset, link reset). However, audio processing, port presence detect, and other functions are
disabled. Per the HD Audio bus HDA015-B, the D3cold state is intended to be used just prior to
removing power to the CODEC. Typically, power will be removed within 200mS. However, the codec
may exit from the D3cold state by generating 2, back-to-back, AFG reset events. Resume time from
D3cold is less than 200mS.
HDA Bus active
Unsolicited Response
18
HDA Bus stopped
Wake Event followed by an unsolicited response
Wake Event followed by an unsolicited response
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92HD66B