SSD1801AV ETC [List of Unclassifed Manufacturers], SSD1801AV Datasheet - Page 11

• Manufacturer Part Number: SSD1801AV
• Description: LCD Segment / Common Driver with Controller for Character Display System
• Manufacturer: ETC [List of Unclassifed Manufacturers]

VF
LCD driving level, V
respectively (see application circuit)
VOUT
DC converter and divider mode only.
VEXT
signal pin. Leave this pin open (NC) if internal voltage regulator is used.
REF
reference V
DIRS
CLK
external clock mode, CLK is used as the clock and OSC bit should be OFF.
P/ S
is pulled low, serial interface will be selected. Read back operation is only available in parallel mode.
DL
C68 / 80
and when the pin is pulled low, 8080 series MCU interface is selected. This pin must be fixed to high or low in serial
mode.
completing the reset is 10ms.
TEST
C
connection will result in different DC-DC converter multiple factor, 2x/3x. Details connections please refer to Figure
12.
RES
SOLOMON
1P
This pin is the input of the built-in voltage regulator. When external resistor network is selected to generate the
Regulated DC/DC voltage converter output. External capacitor is connected to AVDD for internal regulated DC-
This is an input pin to provide an external voltage reference for the internal voltage regulator. It is selected by REF
This pin is to select the input voltage of internal voltage regulator. When this pin is pulled low, the internal voltage
This pin controls the direction of Segment.
When DIRS = Low
When DIRS = High
External clock input. It must be fixed to high or low when the internal oscillation circuit is used. In case of the
This pin is serial/ parallel interface selection input. When this pin is pulled high, parallel mode is selected. When it
This pin is to select the data length for parallel data input.
When P/ S
When P/ S
This pin must be fixed to high or low in serial mode.
This pin is microprocessor interface selection input. When the pin is pulled high, 6800 series interface is selected
This pin is reset signal input. Initialization of the chip is started once this pin is pulled low. Minimum pulse width for
Test pin. This pin is not used for normal operation. Leave this pin open (NC).
When internal DC-DC voltage converter is used, external capacitors are connected between these pins. Different
, C
1N
SEG0 -> SEG2 -> ..... -> SEG78 -> SEG79
SEG79 -> SEG78 -> ..... -> SEG1 -> SEG0
DL = Low or High: serial interface mode
DL = Low: 4-bit bus mode
DL = High: 8-bit bus mode
, C
REF
2P
= Low
= High
is used. When this pin is pulled high, external voltage reference (V
and C
L6
2N
, two external resistors, R
1
and R
2
, are connected between AV
Rev 1
01/2003
.
1
EXT
) is selected.
SS
and V
F
SSD1801 Series
, and V
F
and V
10
L6
,