AM53CF94JCW AMD [Advanced Micro Devices], AM53CF94JCW Datasheet - Page 21

• Manufacturer Part Number: AM53CF94JCW
• Description: Enhanced SCSI-2 Controller (ESC)
• Manufacturer: AMD [Advanced Micro Devices]

STATREG – Bit 2 – MSG – Message
STATREG – Bit 1 – C/D – Command/Data
STATREG – Bit 0 – I/O – Input/Output
SCSI Destination ID Register (04H) Write
SDIDREG – Bits 7:3 – RES – Reserved
SDIDREG – Bits 2:0 – DID 2:0 – Destination ID 2:0
The DID 2:0 bits are the encoded SCSI ID of the device
on the SCSI bus which needs to be selected or
reselected.
At power-up the state of these bits is undefined. The DID
2:0 bits are not affected by reset.
MSG
Bit2
1
1
1
1
0
0
0
0
Bit1
C/D
1
1
0
0
1
1
0
0
SCSI Destination ID Register
SDIDREG
RES
7
0
Bit0
I/O
1
0
1
0
1
0
1
0
RES
6
0
SCSI Phase
Message In
Message Out
Reserved
Reserved
Status
Command
Data_In
Data_Out
RES
5
0
Am53CF94/Am53CF96
P R E L I M I N A R Y
RES
4
0
RES
3
0
DID2
2
x
The MSG, C/D and I/O bits together can be referred to
as the SCSI Phase bits. They indicate the phase of the
SCSI bus. These bits may be latched or unlatched
depending on whether or not the ENF bit in Control
Register Two is set.
In the latched mode the SCSI phase bits are latched at
the end of a command and the latch is opened when the
Interrupt Status Register (INSTREG) is read. In the un-
latched mode, they indicate the phase of the SCSI bus
when this register is read.
DID1
DID2
1
x
1
1
1
1
0
0
0
0
Address: 04
Type: Write
DID0
0
x
H
SCSI Destination ID 2:0
Reserved
Reserved
Reserved
Reserved
Reserved
DID1
1
1
0
0
1
1
0
0
DID0
17348B-21
1
0
1
0
1
0
1
0
SCSI ID
AMD
7
6
5
4
3
2
1
0
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