K4M563233G-FHL/F75 SAMSUNG [Samsung semiconductor], K4M563233G-FHL/F75 Datasheet
K4M563233G-FHL/F75
Related parts for K4M563233G-FHL/F75
K4M563233G-FHL/F75 Summary of contents
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... GENERAL DESCRIPTION The K4M563233G is 268,435,456 bits synchronous high data rate Dynamic RAM organized 2,097,152 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technol- ogy ...
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... K4M563233G - F(H)N/G/L/F FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE CS Data Input Register Column Decoder Latency & Burst Length Programming Register LWE LCAS Timing Register RAS CAS WE Mobile-SDRAM LWCBR LDQM DQM February 2006 ...
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... K4M563233G - F(H)N/G/L/F Package Dimension and Pin Configuration < Bottom View < Top View #A1 Ball Origin Indicator *1 > Pin Name > ...
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... K4M563233G - F(H)N/G/L/F ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current NOTES: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... K4M563233G - F(H)N/G/L/F DC CHARACTERISTICS Recommended operating conditions (Voltage referenced to V Parameter Symbol Operating Current I CC1 (One Bank Active) I CC2 Precharge Standby Current in power-down mode I CC2 I CC2 Precharge Standby Current in non power-down mode I CC2 I CC3 Active Standby Current in power-down mode I CC3 I CC3 Active Standby Current ...
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... K4M563233G - F(H)N/G/L/F AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition VDDQ 1200Ω Output 870Ω Figure 1. DC Output Load Circuit = 2.7V ∼ 3.6V Value 2 ...
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... K4M563233G - F(H)N/G/L/F OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter Row active to row active delay RAS to CAS delay Row precharge time Row active time Row cycle time Last data in to row precharge Last data in to Active delay Last data in to new col. address delay Last data in to burst stop Col ...
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... K4M563233G - F(H)N/G/L/F AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=1 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=1 CAS latency=3 Output data hold time CAS latency=2 CAS latency=1 CLK high pulse width ...
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... K4M563233G - F(H)N/G/L/F SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...
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... K4M563233G - F(H)N/G/L/F A. MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with Normal MRS BA0 ~ BA1 Address A11 ~ A10/AP "0" Setting for Function Normal MRS Normal MRS Mode Test Mode A8 A7 Type Mode Register Set Reserved Reserved Reserved ...
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... K4M563233G - F(H)N/G/L/F Partial Array Self Refresh 1. In order to save power consumption, Mobile SDRAM has PASR option. 2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array and 1/4 of Full Array. BA1=0 BA1=0 BA0=0 BA0=1 BA1=1 BA1=1 BA0=0 BA0=1 - Full Array Internal Temperature Compensated Self Refresh (TCSR order to save power consumption, Mobile-SDRAM includes the internal temperature sensor and control units to control the self refresh cycle automatically according to the two temperature range ...
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... K4M563233G - F(H)N/G/L/F C. BURST SEQUENCE 1. BURST LENGTH = 4 Initial Address BURST LENGTH = 8 Initial Address Sequential ...