K4M56323PG-FHE/G90 SAMSUNG [Samsung semiconductor], K4M56323PG-FHE/G90 Datasheet

K4M56323PG-FHE/G90

Manufacturer Part Number

K4M56323PG-FHE/G90

Description

2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA

Manufacturer

SAMSUNG [Samsung semiconductor]

Datasheet

1.K4M56323PG-FHEG90.pdf (12 pages)

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K4M56323PG-F(H)E/G/C/F

2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA

INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE.

NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PRO-

VIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.

1. For updates or additional information about Samsung products, contact your nearest Samsung office.

2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could

result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or pro-

visions may apply.

FEATURES

• 1.8V power supply.

• LVCMOS compatible with multiplexed address.

• Four banks operation.

• MRS cycle with address key programs.

• EMRS cycle with address key programs.

• All inputs are sampled at the positive going edge of the system

• Burst read single-bit write operation.

• Special Function Support.

• DQM for masking.

• Auto refresh.

• 64ms refresh period (4K cycle).

• Commercial Temperature Operation (-25°C ~ 70°C).

• Extended Temperature Operation (-25°C ~ 85°C).

• 90Balls FBGA ( -FXXX -Pb, -HXXX -Pb Free).

Address configuration

ORDERING INFORMATION

- F(H)E/G : Normal/ Low Power, Extended Temperature(-25°C ~ 85°C)

- F(H)C/F : Normal/ Low Power, Commercial Temperature(-25°C ~ 70°C)

NOTES :

1. In case of 40MHz Frequency, CL1 can be supported.

clock.

-. CAS latency (1, 2 & 3).

-. Burst length (1, 2, 4, 8 & Full page).

-. Burst type (Sequential & Interleave).

-. PASR (Partial Array Self Refresh).

-. Internal TCSR (Temperature Compensated Self Refresh)

-. DS (Driver Strength)

-. DPD (Deep Power Down)

K4M56323PG-F(H)E/G/C/F75

K4M56323PG-F(H)E/G/C/F90

K4M56323PG-F(H)E/G/C/F1L

Organization

8Mx32

Part No.

BA0,BA1

111MHz(CL=3)

133MHz(CL=3), 83MHz(CL2)

111MHz(CL=3), 83MHz(CL2)

Bank

Max Freq.

GENERAL DESCRIPTION

rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits,

fabricated with SAMSUNG’s high performance CMOS technol-

ogy. Synchronous design allows precise cycle control with the

use of system clock and I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst lengths and programmable latencies allow the same

device to be useful for a variety of high bandwidth and high per-

formance memory system applications.

The K4M56323PG is 268,435,456 bits synchronous high data

, 66MHz(CL2)

A0 - A11

Row

Interface

LVCMOS

Mobile-SDRAM

Column Address

A0 - A8

90 FBGA Pb

(Pb Free)

Package

January 2006

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