KMM372V413CK SAMSUNG [Samsung semiconductor], KMM372V413CK Datasheet - Page 6

• Manufacturer Part Number: KMM372V413CK
• Description: 4M x 72 DRAM DIMM with ECC using 2Mx8, Dual Bank 2K Refresh, 3.3V
• Manufacturer: SAMSUNG [Samsung semiconductor]

DRAM MODULE
NOTES
1.
2.
3.
4.
5.
6.
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
Input voltage levels are Vih/Vil. V
erence levels for measuring timing of input signals. Transition
times are measured between V
assumed to be 5ns for all inputs.
Measured with a load equivalent to 1TTL loads and 100pF.
Voh=2.0V and Vol=0.8V.
Operation within the
can be met.
If
access time is controlled exclusively by
Assumes that
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to V
t
RCD
is greater than the specified
t
RCD
t
RCD
(max) is specified as a reference point only.
t
RCD
t
RCD
(max).
(max) limit insures that
IH
IH
(min) and V
(min) and V
t
t
RCD
CAC
(max) limit, then
.
IL
IL
(max) and are
(max) are ref-
OH
t
RAC
or V
(max)
OL
.
10.
11.
7.
8.
9.
t
data sheet as electrical characteristic only. If
the cycle is an early write cycle and the data out pin will
remain high impedance for the duration of the cycle.
Either
These parameters are referenced to the CAS leading edge in
early write cycles.
Operation within the
can be met.
t
time is controlled by
The timing skew from the DRAM to the DIMM resulted from
the addition of buffers.
WCS
RAD
is greater than the specified
is not restrictive operating parameter. It included in the
t
RCH
or
t
RAD
t
RRH
(max) is specified as reference point only. If
must be satisfied for a read cycle.
t
AA
t
RAD
.
KMM372V413CK/CS
(max) limit insures that
t
RAD
(max) limit, then access
t
WCS
t
t
RAC
WCS
(max)
(min)