CH7028B-TFI Chrontel, CH7028B-TFI Datasheet - Page 4

• Manufacturer Part Number: CH7028B-TFI
• Manufacturer: Chrontel

Specifications of CH7028B-TFI

• Case: QFP64
• Date_code: 08+

CHRONTEL
CH7028B
Figures and Tables
LIST OF FIGURES
Figure 1: CH7028B Block Diagram ...................................................................................................................................2
Figure 2: 80 pin BGA Package(Top view) .........................................................................................................................5
Figure 3: 64 pin LQFP Package..........................................................................................................................................6
Figure 4: SDR and DDR Input Data Formats...................................................................................................................11
Figure 5: Horizontal Input Timing ...................................................................................................................................11
Figure 6: Vertical Input Timing........................................................................................................................................12
Figure 7: CPU/MEMERY Interface Timing.....................................................................................................................12
Figure 8: 80 Pin BGA Package.........................................................................................................................................19
Figure 9: 64 Pin LQFP Package .......................................................................................................................................20
LIST OF TABLES
Table 1: Pin Name Description (BGA Package) ................................................................................................................7
Table 2: Pin Name Descriptions (LQFP64 Package)..........................................................................................................9
Table 3: Input Data Format...............................................................................................................................................13
Table 4: Supported SDTV Standards................................................................................................................................14
Table 5: Video DAC Configurations for CH7028B .........................................................................................................14
Table 6: Test Pattern Selection .........................................................................................................................................15
4
209-1000-001
Rev. 1.1,
08/21/2008