U3742BM-M3FL ATMEL [ATMEL Corporation], U3742BM-M3FL Datasheet - Page 14

• Manufacturer Part Number: U3742BM-M3FL
• Description: UHF ASK/FSK RECEIVER
• Manufacturer: ATMEL [ATMEL Corporation]

Figure 13. Polling Mode Flow Chart
14
NO
U3742BM
The receiver is turned on permanently
and passes the data stream to the
connected microcontroller. It can be set
to Sleep mode through an OFF
command via pin DATA or ENABLE.
T
(T
T
I
I
Sleep mode:
All circuits for signal processing
are disabled. Only XTO and
polling logic are enabled.
I
Start-up mode:
The signal processing circuits are
enabled. After the start-up time
condition and ready to receive.
The incoming data stream is
analyzed. If the timing indicates a
valid transmitter signal, the receiver
is set to receiving mode. Otherwise
it is set to Sleep mode.
Receiving mode:
Bit check mode:
I
T
S
S
S
Sleep
Bitcheck
S
Startup
Startup
= I
= I
= I
= I
Son
Son
Soff
= Sleep
Son
) all circuits are in stable
Bit check
OFF command
X
OK ?
Sleep
YES
1024 T
Clk
T
T
Sleep:
T
X
Startup
CLK
Bitcheck
Sleep
:
:
:
:
The baud rate range is defined by Baud0 and Baud1
in the OPMODE register.
Is defined by the selected baud rate range and T
Basic clock cycle defined by f
according to Table 8
Depends on the result of the bit check
the number of bits to be checked (N
and on the utilized data rate.
If the bit check fails, the average time period for
that check depends on the selected baud rate
range and on T
Baud0 and Baud1 in the OPMODE register.
5-bit word defined by Sleep0 to
Sleep4 in OPMODE register
XSleep
If the bit check is ok, T
Extension factor defined by
Std
and XSleep
Clk
. The baud rate is defined by
Temp
bitcheck
depends on
XTO
and pin MODE
Bitcheck
)
4735A–RKE–11/03
Clk
.