GM71V18163C Hynix Semiconductor, GM71V18163C Datasheet

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GM71V18163C

Manufacturer Part Number
GM71V18163C
Description
1/048/576 WORDS x 16 BIT CMOS DYNAMIC RAM
Manufacturer
Hynix Semiconductor
Datasheet

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Pin Configuration
Rev 0.1 / Apr’01
Description
generation dynamic RAM organized 1,048,576
x 16 bit. GM71V(S)18163C/CL has realized
higher density, higher performance and various
functions by utilizing advanced CMOS process
technology. The GM71V(S)18163C/CL offers
Extended Data out(EDO) Mode as a high speed
access mode. Multiplexed address inputs permit
the GM71V(S)18163C/CL to be packaged in
standard 400 mil 42pin plastic SOJ, and standard
400mil 44(50)pin plastic TSOP II. The package
size provides high system bit densities and is
compatible with widely available automated
testing and insertion equipment.
The GM71V(S)18163C/CL is the new
RAS
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
V
V
V
WE
NC
NC
NC
NC
A0
A3
A1
A2
CC
CC 6
CC 21
15
12
18
19
1
2
3
4
5
7
8
9
10
11
13
14
16
17
20
42 SOJ
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
V
I/O15
I/O14
I/O13
I/O12
V
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
SS
SS
(Top View)
Features
* 1,048,576 Words x 16 Bit Organization
* Extended Data Out Mode Capability
* Single Power Supply (3.3V+/-0.3V)
* Fast Access Time & Cycle Time
* Low Power
* RAS Only Refresh, CAS before RAS Refresh,
* All inputs and outputs TTL Compatible
* 1024 Refresh Cycles/16ms
* 1024 Refresh Cycles/128ms (L-version)
* Self Refresh Operation (L-version)
* Battery Back Up Operation (L-version)
* 2 CAS byte Control
Active : 684/612/540mW (MAX)
Standby : 7.2mW (CMOS level : MAX)
Hidden Refresh Capability
GM71V(S)18163C/CL-5
GM71V(S)18163C/CL-6
GM71V(S)18163C/CL-7
44(50) TSOP II
RAS
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
A11
A10
V
V
WE
V
NC
NC
NC
A0
A1
A2
A3
CC
CC
0.83mW (L-version : MAX)
CC
18
10
11
15
16
17
19
20
21
22
23
1
2
3
4
5
6
7
8
9
24
25
1,048,576 WORDS x 16 BIT
GM71VS18163CL
CMOS DYNAMIC RAM
50
49
48
47
46
45
44
43
42
41
40
36
35
34
33
32
31
30
29
28
27
26
GM71V18163C
t
V
I/O15
I/O14
I/O13
I/O12
V
I/O11
I/O10
I/O9
I/O8
NC
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
RAC
V
50
60
70
SS
SS
SS
t
CAC
13
15
18
104
124
t
84
(Unit: ns)
RC
t
HPC
20
25
30

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GM71V18163C Summary of contents

Page 1

... A11 A10 (Top View) GM71V18163C GM71VS18163CL 1,048,576 WORDS x 16 BIT CMOS DYNAMIC RAM (Unit: ns RAC CAC RC HPC 104 124 I/O15 49 I/O14 ...

Page 2

... Function Pin Access Time 50ns 60ns 70ns 50ns 60ns 70ns Parameter SS SS GM71V18163C GM71VS18163CL Function Read/Write Enable Output Enable Power (+3.3V) Ground No Connection Package 400 Mil 42 Pin Plastic SOJ 400 Mil 44(50) Pin Plastic TSOP II Rating Unit -55 ~ 125 C -0 ...

Page 3

... Valid Valid Valid D D Open D D Open D Open D Open Open GM71V18163C GM71VS18163CL Min Typ Max Unit 3.0 3.3 3.6 2 0.3 CC -0.3 - 0.8 Operation Standby Lower byte Read cycle Upper byte Word Lower byte Early write cycle ...

Page 4

... High- OUT - 0.2V High-Z) CC OUT t 0.3 , <= us, RAS IH IL Enable = OUT D High- OUT 4.6V) <= V 6V) <= <= 4. OUT . IL GM71V18163C GM71VS18163CL = 0 ~ 70C) A Min Max Unit Note 2 0.4 V 50ns - 190 - 170 60ns 70ns 150 - 2 mA 50ns - 190 - 170 60ns mA - 70ns 150 50ns ...

Page 5

... Min 84 - 104 10,000 8 10,000 GM71V18163C GM71VS18163CL Min Max Unit Note - 70C, Note 1, 2, 18, 19, 20) (100 pF) L GM71V(S)18163 C/CL-7 Unit Note Max Min Max - 124 - ...

Page 6

... Output Buffer turn off to RAS OFR t Output Buffer turn off to WE WEZ Delay Time WDD IN t RAS to D Delay Time RDD IN Rev 0.1 / Apr’01 GM71V18163C GM71VS18163CL GM71V(S)18163 GM71V(S)18163 GM71V(S)18163 C/CL-5 C/CL-6 C/CL-7 Min Max Min Max Min Max - ...

Page 7

... Refresh Cycle Symbol Parameter t CAS Setup Time CSR (CAS-before-RAS Refresh Cycle) t CAS Hold Time CHR (CAS-before-RAS Refresh Cycle) t RAS Precharge to CAS Hold Time RPC Rev 0.1 / Apr’01 GM71V18163C GM71VS18163CL GM71V(S)18163 GM71V(S)18163 GM71V(S)18163 C/CL-5 C/CL-6 C/CL-7 Min Max Min Max Min Max 0 ...

Page 8

... EDO Page Mode Read-Modify-Write HPRWC Cycle Time t WE Delay Time from CAS Precharge CPW Refresh Symbol Parameter t Refresh period REF t Refresh period (L -Series) REF Rev 0.1 / Apr’01 GM71V18163C GM71VS18163CL GM71V(S)18163 GM71V(S)18163 GM71V(S)18163 C/CL-5 C/CL-6 C/CL-7 Min Max Min Max Min Max 20 - ...

Page 9

... RAD RAD are not restrictive operating parameters. They are included in CPW >= t WCS (min), t >=t (min), and t CWD CWD AWD >= t (min), the cycle is a read-modify-write and the data out- CPW CPW GM71V18163C GM71VS18163CL GM71VS18163 CL-7 Unit Max Min Max - - us 100 100 ...

Page 10

... UCAS or LCAS. CPW and t , and between t and t OHR OH OFR timing, 10us<=t <=100us. During this period, the device is in RASS <= V (max (min) < GM71V18163C GM71VS18163CL . ACP +t +2tT) becomes greater than CAS CP min/V max level OFF >=100us, then RASS <= V ...

Page 11

... Rev 0.1 / Apr’01 0.128(3.25) MIN 0.148(3.75) MAX 0.026(0.66) MIN 0.032(0.81) MAX 0.037(0.95) MIN 0.041(1.05) MAX 0.047(1.20) MAX 0.031(0.80) 0.002(0.05) MIN TYP 0.006(0.15) MAX GM71V18163C GM71VS18163CL Unit: Inches (mm) 0.025(0.64) MIN 0.093(2.38) MIN ¡ £ 0.016(0.40) MIN 0.024(0.60) MAX 0.004(0.12) MIN 0.008(0.21) MAX ...

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