EM78451AP EMC [ELAN Microelectronics Corp], EM78451AP Datasheet - Page 27

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EM78451AP

Manufacturer Part Number
EM78451AP
Description
8-Bit Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
Product Specification (V1.2) 05.27.2004
(This specification is subject to change without further notice)
SRO (bit 5): SPI Read Overflow bit
SSE (bit 4): SPI Shift Enable bit
SBRS (bit 2~0): SPI Baud Rate Select Bits
INTC: Interrupt control register
Bit 3 (TM1IE) TM1IE interrupt enable bit.
SBRS2 (Bit 2)
1 = A new data is received while the previous data is still being on hold in the
SPIB register. Under this condition, the data in SPIS register will be destroyed.
To avoid setting this bit, users should read the SPIRB register even if the
transmission is implemented only.
0 = No overflow.
1 = Start to shift, and stays on 1 while the current byte continues to transmit.
0 = Reset as soon as the shifting is completed, and the next byte is ready to shift.
0: disable TM1IE interrupt
1: enable TM1IE interrupt
0
0
0
0
1
1
1
1
SBRS1 (Bit 1)
This can only occur under slave mode.
This bit can be reset by hardware only.
0
0
1
1
0
0
1
1
In master mode, /SS is disable.
SBRS0 (Bit 0)
NOTE
NOTE
NOTE
0
1
0
1
0
1
0
1
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
8-Bit Microcontroller
/SS disable
Baud Rate
/SS enable
Fsco/16
Fsco/32
TMR1/2
EM78451
Fsco/2
Fsco/4
Fsco/8
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