PDM31096SA10SO ETC1 [List of Unclassifed Manufacturers], PDM31096SA10SO Datasheet - Page 7

• Manufacturer Part Number: PDM31096SA10SO
• Description: 4 Megabit 3.3V Static RAM 512K x 8-Bit
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

Rev. 2.4 - 5/27/98
Write Cycle No. 3 (Chip Enable Controlled)
AC Electrical Characteristics
* V
NOTES: (For two previous Electrical Characteristics tables)
1. The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured 200 mV from steady state voltage.
2. At any given temperature and voltage condition, t
3. This parameter is sampled.
4. WE is high for a READ cycle.
5. The device is continuously selected. All the Chip Enables are held in their active state.
6. The address is valid prior to or coincident with the latest occuring Chip Enable.
Description
WRITE Cycle
WRITE cycle time
Chip enable to end of write
Address valid to end of write
Address setup time
Address hold from end of write
Write pulse width
Data setup time
Data hold time
Write disable to output in low Z
Write enable to output in high Z
CC
= 3.3V +5%
NOTE: Output Enable (OE) is inactive (high)
ADDR
D
CE
OUT
WE
D
IN
(1,3)
(1,3)
t
AS
t
t
Sym
HZWE
LZWE
t
t
t
t
t
t
t
t
WC
CW
WP
AW
AH
DH
AS
DS
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
—
PRELIMINARY
8
8
8
0
0
7
5
0
0
t
AW
-8*
HZCE
—
—
—
—
—
—
—
—
—
t
4
WC
t
is less than t
CW
10
10
10
0
0
8
6
0
0
t
WP
-10*
DATA VALID
t
DS
—
—
—
—
—
—
—
—
—
5
HIGH-Z
LZCE
12
10
10
—
.
0
0
8
7
0
0
-12
t
—
—
—
—
—
—
—
—
—
AH
6
15
11
11
—
0
0
9
8
0
0
t
DH
-15
—
—
—
—
—
—
—
—
—
7
20
13
13
10
—
0
0
9
0
0
-20
—
—
—
—
—
—
—
—
—
9
PDM31096
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
10
11
12
1
2
3
4
5
6
7
8
9