74LVC1G04GW-G Philips, 74LVC1G04GW-G Datasheet

74LVC1G04GW-G

Manufacturer Part Number

74LVC1G04GW-G

Description

Semiconductors and Actives, Logic Gates, Single, ic, Logic, Standard, NOT Gates (Inverters)

Manufacturer

Philips

Datasheet

1.74LVC1G04GW-G.pdf (15 pages)

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1. General description

2. Features

The 74LVC1G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device,

superior to most advanced CMOS compatible TTL families.

Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these

devices in a mixed 3.3 V and 5 V environment.

Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall

time.

This device is fully speciﬁed for partial power-down applications using I

The I

the device when it is powered down.

The 74LVC1G04 provides the inverting buffer.

74LVC1G04

Single inverter

Rev. 06 — 2 February 2007

Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant inputs for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:

ESD protection:

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

Multiple package options

Speciﬁed from 40 C to +85 C and 40 C to +125 C.

24 mA output drive (V

OFF

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8-B/JESD36 (2.7 V to 3.6 V)

HBM JESD22-A114-D exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

circuitry disables the output, preventing the damaging backﬂow current through

= 3.0 V)

Product data sheet

OFF

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74LVC1G04GW-G Summary of contents

Page 1

Single inverter Rev. 06 — 2 February 2007 1. General description The 74LVC1G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Input can be driven from either 3 ...

Page 2

... Type number Package Temperature range Name 74LVC1G04GW +125 C 74LVC1G04GV +125 C 74LVC1G04GM +125 C 74LVC1G04GF +125 C 4. Marking Table 2. Marking Type number 74LVC1G04GW 74LVC1G04GV 74LVC1G04GM 74LVC1G04GF 5. Functional diagram mna108 Fig 1. Logic symbol 74LVC1G04_6 Product data sheet Description TSSOP5 plastic thin shrink small outline package ...

Page 3

NXP Semiconductors 6. Pinning information 6.1 Pinning 74LVC1G04 n. GND 001aab618 Fig 4. Pin conﬁguration SOT353-1 and SOT753 6.2 Pin description Table 3. Pin description Symbol Pin SOT353-1/SOT753 n. ...

Page 4

NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V ...

Page 5

NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter +85 C amb V HIGH-level input voltage IH V LOW-level input ...

Page 6

NXP Semiconductors Table 7. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter +125 C amb V HIGH-level input voltage IH V LOW-level input voltage IL V ...

Page 7

NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions t propagation delay see power ...

Page 8

NXP Semiconductors Table 9. Measurement points Supply voltage 1. 2.7 V 2 3 5.5 V Test data is given in Table 10. Deﬁnitions ...

Page 9

NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. ...

Page 10

NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions UNIT 0.100 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT753 Fig 10. Package outline ...

Page 11

NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT ...

Page 12

NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max ...

Page 13

NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID ...

Page 14

NXP Semiconductors 16. Legal information 16.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualiﬁcation Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

Page 15

NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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