74LVC4066D,112 NXP Semiconductors, 74LVC4066D,112 Datasheet
74LVC4066D,112
Specifications of 74LVC4066D,112
935273717112
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74LVC4066D,112 Summary of contents
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Quad bilateral switch Rev. 4 — 24 November 2010 1. General description The 74LVC4066 is a high-speed Si-gate CMOS device. The 74LVC4066 provides four single pole, single-throw analog switch functions. Each switch has two input/output terminals (nY and nZ) ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range 40 C to +125 C 74LVC4066D 74LVC4066PW 40 C to +125 C 40 C to +125 C 74LVC4066BQ 4. Functional diagram mnb111 Fig 1. Logic symbol Fig 3. Logic diagram (one switch) 74LVC4066 Product data sheet ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning 4066 GND 7 001aad117 Fig 4. Pin configuration for SO14 and TSSOP14 5.2 Pin description Table 2. Pin description Symbol Pin GND 74LVC4066 Product data sheet (1) This is not a supply pin. The substrate is attached to this Fig 5. Description independent input/output ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V switch voltage SW T ambient temperature amb t/V input transition rise and fall rate [1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch must not exceed 0 ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C input I capacitance C OFF-state S(OFF) capacitance C ON-state S(ON) capacitance [1] All typical values are measured at T [2] These typical values are measured at V 9.1 Test circuits V CC ...
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... NXP Semiconductors Table 7. ON resistance …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Symbol Parameter R ON resistance (rail) ON(rail resistance ON(flat) (flatness) [1] Typical values are measured at T [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical V temperature ...
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... NXP Semiconductors 9.3 ON resistance test circuit and graphs GND Fig 8. Test circuit for measuring ON resistance (Ω (4) (3) (2) ( 0.4 0.8 = 125 C. (1) T amb = 85 C. (2) T amb = 25 C. (3) T amb = 40 C. (4) T amb Fig 10. ON resistance as a function of input voltage 1.8 V ...
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... NXP Semiconductors (Ω) 11 (1) 9 (2) ( 0.5 1.0 1.5 = 125 C. (1) T amb = 85 C. (2) T amb = 25 C. (3) T amb = 40 C. (4) T amb Fig 12. ON resistance as a function of input voltage 2 125 C. (1) T amb = 85 C. (2) T amb = 25 C. (3) T amb = 40 C. ...
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... NXP Semiconductors 10. Dynamic characteristics Table 8. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit Symbol Parameter Conditions t propagation delay nY; pd see enable time nZ; see disable time nZ; see dis power dissipation capacitance [1] Typical values are measured at T [2] ...
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... NXP Semiconductors 10.1 Waveforms and test circuit Measurement points are given in Logic levels: V and Fig 15. Input (nY or nZ) to output (nZ or nY) propagation delays HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 16. Enable and disable times Table 9. Measurement points Supply voltage ...
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... NXP Semiconductors Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance External voltage for measuring switching times. EXT Fig 17. Load circuit for switching times Table 10. Test data Supply voltage ...
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... NXP Semiconductors Table 11. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T Symbol Parameter frequency response (-3dB) isolation (OFF-state) iso V crosstalk voltage ct Xtalk crosstalk 74LVC4066 Product data sheet …continued Conditions = 600 pF see Figure pF; see ...
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... NXP Semiconductors Table 11. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T Symbol Parameter Q charge injection inj 10.2.1 Test circuits Test conditions 1. 1.4 V (p-p 2 (p-p 2.5 V (p-p 4 (p-p Fig 18. Test circuit for measuring total harmonic distortion Adjust f voltage to obtain 0 dBm level at output. Increase f i Fig 19 ...
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... NXP Semiconductors Adjust f voltage to obtain 0 dBm level at input. i Fig 20. Test circuit for measuring isolation (OFF-state) Fig 21. Test circuit for measuring crosstalk voltage (between digital inputs and switch log ( log Fig 22. Test circuit for measuring crosstalk between switches 74LVC4066 Product data sheet ...
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... NXP Semiconductors = V inj O L V = output voltage variation generator resistance. gen = generator voltage. V gen Fig 23. Test circuit for measuring charge injection 74LVC4066 Product data sheet gen nY/nZ G logic V gen input logic off on input (nE All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 11. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 12. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model DUT Device Under Test 13. Revision history Table 13. Revision history Document ID Release date 74LVC4066 v.4 20101124 • Modifications: Figure note [1] 74LVC4066 v ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 15. Contact information For more information, please visit: For sales office addresses, please send an email to: 74LVC4066 Product data sheet 14 ...
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... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics 9.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 9.2 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 9.3 ON resistance test circuit and graphs Dynamic characteristics ...