MT47H128M16RT-25E AIT:C Micron, MT47H128M16RT-25E AIT:C Datasheet
MT47H128M16RT-25E AIT:C
Related parts for MT47H128M16RT-25E AIT:C
MT47H128M16RT-25E AIT:C Summary of contents
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... RoHS-compliant • Supports JEDEC clock jitter specification PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN Products and specifications discussed herein are subject to change by Micron without notice. Options • Configuration – 512 Meg x 4 (64 Meg banks) – 256 Meg x 8 (32 Meg banks) – ...
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... CK = 2.5ns - 3ns - 3ns 3.75ns -37E 5ns -5E Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Features t RC (ns ...
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... FBGA Part Number System Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Micron’s Web site: http://www.micron.com. PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN ...
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... Output Drive Strength ................................................................................................................................ 84 DQS# Enable/Disable ................................................................................................................................. 84 RDQS Enable/Disable ................................................................................................................................. 84 Output Enable/Disable ............................................................................................................................... 84 On-Die Termination (ODT) ......................................................................................................................... 85 PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN 2Gb: x4, x8, x16 DDR2 SDRAM 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. Features ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... CKE Low Anytime ...................................................................................................................................... 127 ODT Timing .................................................................................................................................................. 129 MRS Command to ODT Update Delay ........................................................................................................ 131 PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN 2Gb: x4, x8, x16 DDR2 SDRAM 5 Micron Technology, Inc. reserves the right to change products or specifications without notice. Features ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... DS 6 2Gb: x4, x8, x16 DDR2 SDRAM and IH) .................................................... and IH) ........................................... 61 t and DH ................................................... DDR2-667 ...................................... 66 REF ) at DDR2-533 ...................................... 67 REF ) at DDR2-400 ...................................... 67 REF Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Features ...
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... Figure 50: READ-to-WRITE ............................................................................................................................ 98 PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev ............................................................................................................... .............................................................................................................. ............................................................................................................. ............................................................................................................. 69 t RCD (MIN) .............................................................................. 92 7 2Gb: x4, x8, x16 DDR2 SDRAM Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Features ...
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... QH, and Data Valid Window .................................................. 103 t t DQSQ, QH, and Data Valid Window ..................................................... 104 and DQSCK ......................................................................................... 105 8 2Gb: x4, x8, x16 DDR2 SDRAM Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Features ...
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... READ A = READ with auto precharge REFRESH = REFRESH SR = SELF REFRESH WRITE = WRITE WRITE A = WRITE with auto precharge READ Reading READ A Reading with auto precharge Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... Rev. G 7/11 EN 2Gb: x4, x8, x16 DDR2 SDRAM C values must be derated when Micron Technology, Inc. reserves the right to change products or specifications without notice. Functional Description exceeds 85°C; this also requires is < 0°C or > 85°C. C ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... T DD via 1k * resistor DD via 1k * resistor Micron Technology, Inc. reserves the right to change products or specifications without notice. Functional Description exceeds 85° < 0°C C via 1k * resistors, or float ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... CK out Data Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. V DDQ sw3 sw3 R3 DQ[13:0] R3 sw3 R3 DQS, DQS# R3 sw3 SSQ ...
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... CK out Data Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. V DDQ sw3 sw3 R3 DQ[7:0] R3 sw3 R3 DQS, DQS# R3 RDQS# sw3 RDQS R3 DM ...
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... CK out Data Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. V DDQ sw3 sw3 R3 DQ[15:0] R3 sw3 R3 UDQS, UDQS# R3 LDQS, LDQS# sw3 R3 UDM, LDM ...
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... V NF, DQ7 SSQ V DQ0 V DDQ DDQ DQ2 V NF, DQ5 SSQ SSDL DD RAS# CK# ODT CAS# CS A11 RFU A13 Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... DQ3 SSQ V V REF SS CKE WE# BA0 BA1 A10 RFU A12 16 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM UDQS#/NU V SSQ DDQ UDQS V DQ15 SSQ V DQ8 V DDQ DDQ DQ10 ...
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... Rev. G 7/11 EN 2Gb: x4, x8, x16 DDR2 SDRAM Ball Assignments and Descriptions is applied during first power-up. After Micron Technology, Inc. reserves the right to change products or specifications without notice. has be- REF must be REF ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... Reserved for future use: Row address bits A14 (R3), A15 (R7) on the x16, and A15 (L7) on the x4/x8. PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN 2Gb: x4, x8, x16 DDR2 SDRAM Ball Assignments and Descriptions and SSQ 18 Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... ±0. 0.8 TYP 1.2 MAX 6.4 CTR 0.25 MIN 11.5 ±0.15 19 2Gb: x4, x8, x16 DDR2 SDRAM Ball A1 ID Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Packaging ...
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... 12.5 ±0 0.8 TYP 6.4 CTR 9 ±0.1 36%Pb, 2% Ag). 20 2Gb: x4, x8, x16 DDR2 SDRAM Ball A1 ID 1.2 MAX 0.25 MIN Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Packaging ...
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... Ball ±0. 0.8 TYP 6.4 CTR 11.5 ±0.15 21 2Gb: x4, x8, x16 DDR2 SDRAM Ball A1 ID 1.2 MAX 0.25 MIN Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Packaging ...
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... Ball 11.5 ±0 0.8 TYP 6.4 CTR 9 ±0.1 22 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM Packaging Ball A1 ID 1.2 MAX 0.25 MIN ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... V DDQ REF (peak-to-peak) = 0.1V. DM input is grouped with I/O Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Packaging Notes 100 MHz, SS ...
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... Min Max Units –1.0 2.3 V –0.5 2.3 V –0.5 2.3 V –0.5 2.3 V –5 5 μA –5 5 μA –2 2 μA V provided that V DDQ REF . DDQ Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Notes 300mV. ...
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... C Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Notes during opera- ...
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... Electrical Specifications – Absolute Ratings JA (°C/W) JA (°C/W) Airflow = 0m/s Airflow = 1m/s 48.0 34.4 33.7 26.7 48.0 34.4 33.7 26.7 63.8 46.9 46.9 38.1 60.0 43.5 43.2 34.7 be viewed as a typical number. 26 2Gb: x4, x8, x16 DDR2 SDRAM JA (°C/W) Airflow = 2m/s JB (°C/W) 29.3 21.6 23.8 19.7 29.3 21.6 23.8 19.7 40.8 29.9 34.4 29.2 37.9 26.0 31.5 25.5 Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. JC (°C/W) 1.6 1.6 4.3 4.1 ...
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... Defined by pattern in Table 9 (page 28) Defined by pattern in Table 9 (page 28) 27 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM DD -3E -3 -37E ...
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... PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN Electrical Specifications – 2Gb: x4, x8, x16 DDR2 SDRAM without violating DD Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Parameters t RRD (I ) using DD ...
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... Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Parameters -5E Units 115 105 mA 135 ...
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... DD2N DD2Q DD3N DD3P(FAST) DD4R must be derated by 20%; I DD2P must be derated by DD6 will increase by this amount if T Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Parameters DD -5E Units 250 mA 250 12 ...
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... Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Parameters DD -3/-3E Units 75 mA 110 90 mA 120 ...
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... DD2N DD2Q DD3N DD3P(FAST) DD4R must be derated by 20%; I DD2P must be derated by DD6 will increase by this amount if T Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Parameters DD -3/-3E Units 165 mA 200 12 mA ...
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AC Timing Operating Specifications Table 12: AC Operating Specifications and Conditions Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table 1.8V ...
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Table 12: AC Operating Specifications and Conditions (Continued) Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table 1.8V ±0.1V ...
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Table 12: AC Operating Specifications and Conditions (Continued) Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table 1.8V ±0.1V ...
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Table 12: AC Operating Specifications and Conditions (Continued) Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table 1.8V ±0.1V ...
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Table 12: AC Operating Specifications and Conditions (Continued) Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table 1.8V ±0.1V ...
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Table 12: AC Operating Specifications and Conditions (Continued) Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table 1.8V ±0.1V ...
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Table 12: AC Operating Specifications and Conditions (Continued) Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table 1.8V ±0.1V ...
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Table 12: AC Operating Specifications and Conditions (Continued) Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table 1.8V ±0.1V ...
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... CH (AVG) and CL (AVG) are the average of any 200 t CH actually applied to the device CK and CK# inputs; thus, ), where 6–10, or 11–50 is the amount of clock time allowed to when derating clock-related output timing (see notes 19 and 48). Micron requires to be used. t RPRE). and V ...
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The inputs to the DRAM must be aligned to the associated clock, that is, the actual clock that latches it in. Howev- er, the input timing (in ns) references to the lowing input parameters are determined by taking the ...
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Table 33 (page 66). Single-ended DQS data timing is referenced at DQS crossing V for a single-ended DQS strobe are listed in Table 34 (page 66)–Table 36 (page 67) on Table 34 (page 66), Table 35 (page 67), and Table ...
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The half-clock of AOFD’s 2.5 CK assumes a 50/50 clock duty cycle. This half-clock value must be derated by the amount of half-clock duty cycle error. For example, if the clock duty cycle was 47/53, t 0.03, ...
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... REF bypass capacitor. REF is a system supply for signal termination re and must track variations in the DC level of REF Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Units Notes ...
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... TT1(EFF) R 120 150 180 TT2(EFF TT3(EFF) VM –6 – 6 and V IH(AC) ), and I(V ), respectively. IH[AC] IL[AC] Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Units Notes the ball IL(DC) ...
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... AC noise REF error REF error REF noise REF V IL(DC) V IL(AC) Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Units mV mV Units 1 mV DDQ 1 mV DDQ - 250 mV - 200 ...
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... ID(DC) IX(AC) MP(DC ID(AC IN(DC)min + 0.3V or more negative than V DDQ when static and is centered around V Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Units Notes IH(DC) ...
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... Numbers in diagram reflect nominal values (V PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN Input Electrical Characteristics and Operating Conditions 49 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM = 1.8V). DDQ ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... OH - 280mV. /I must be less than 21 for values of V OUT plus a noise margin and IH,min Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Units Notes Notes OUT ...
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... DD /I must be less than 23.4 for values of V OUT IL(DC)max IH(DC)min to V IL(AC)max IH(AC)min Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Units Notes V/ 1.7V; DDQ between ...
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... Table 21: Full Strength Pull-Down Current (mA) Voltage (V) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN 0.0 0.5 1.0 V (V) OUT Min 0.00 4.30 8.60 12.90 16.90 20.40 23.28 25.44 26.79 27.67 28.38 28.96 29.46 29.90 30.29 30.65 30.98 31.31 31.64 31.96 52 2Gb: x4, x8, x16 DDR2 SDRAM Output Driver Characteristics 1.5 Nom 0.00 5.63 11.30 16.52 22.19 27.59 32.39 36.45 40.38 44.01 47.01 49.63 51.71 53.32 54.9 56.03 57.07 58.16 59.27 60.35 Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Max 0.00 7.95 15.90 23.85 31.80 39.75 47.70 55.55 62.95 69.55 75.35 80.35 84.55 87.95 90.70 93.00 95.05 97.05 99.05 101.05 ...
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... Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Max 0.00 –7.95 –15.90 –23.85 –31.80 –39.75 –47.70 –55.55 –62.95 –69.55 – ...
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... Table 23: Reduced Strength Pull-Down Current (mA) Voltage (V) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev. G 7/11 EN 0.0 0.5 1.0 V (V) OUT Min 0.00 1.72 3.44 5.16 6.76 8.16 9.31 10.18 10.72 11.07 11.35 11.58 11.78 11.96 12.12 12.26 12.39 12.52 12.66 12.78 54 2Gb: x4, x8, x16 DDR2 SDRAM Output Driver Characteristics 1.5 Nom 0.00 2.98 5.99 8.75 11.76 14.62 17.17 19.32 21.40 23.32 24.92 26.30 27.41 28.26 29.10 29.70 30.25 30.82 31.41 31.98 Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Max 0.00 4.77 9.54 14.31 19.08 23.85 28.62 33.33 37.77 41.73 45.21 48.21 50.73 52.77 54.42 55.80 57.03 58.23 59.43 60.63 ...
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... Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Max 0.00 –4.77 –9.54 –14.31 –19.08 –23.85 –28.62 –33.33 –37.77 –41.73 – ...
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... Power and Ground Clamp Characteristics Minimum Power Clamp Current (mA) 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.1 1.0 2.5 4.7 6.8 9.1 11.0 13.5 16.0 18.2 21.0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 Voltage Across Clamp (V) 56 2Gb: x4, x8, x16 DDR2 SDRAM Minimum Ground Clamp Current (mA) 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.1 1.0 2.5 4.7 6.8 9.1 11.0 13.5 16.0 18.2 21.0 Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 57
... Vns 0.23 Vns 0.23 Vns 0.23 Vns Overshoot area Undershoot area Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. -37E -5E 0.50V 0.50V 0.50V 0.50V 1.00 Vns 1.33 Vns 1.00 Vns 1.33 Vns ...
Page 58
... IX is the true input signal and the rising edge and 2 × V IH(AC) Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Notes ...
Page 59
... REF(DC the time of the rising clock transition), a valid in- IH[AC] IL[AC] 59 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM Input Slew Rate Derating t IH (hold time) required is calculated t t ...
Page 60
... Micron Technology, Inc. reserves the right to change products or specifications without notice. 1.0 V/ Units 247 154 ps 239 149 ps 227 143 ps 210 135 ps 185 ...
Page 61
... Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Units ...
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... IS Nominal slew rate REF region IH(AC)min REF(DC Tangent line REF region TR Tangent line ( IH[AC]min REF[DC] TR Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 63
... IH Nominal slew rate REF region Nominal line Tangent line REF line region TF Tangent line ( IH[DC]min REF[DC Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 64
... DQ referenced at REF is listed in Table 35 (page 67) and REF -based fully derated values for the DQ REF -based fully derated values for REF Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. 0.8 V/ – ...
Page 65
... IH(AC) and DQ referenced at REF is listed in Table 34 (page 66). Ta- REF t DS and a Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. 0.8 V/ 123 172 ...
Page 66
... Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. 0.4 V/ 175 38 20 142 17 –22 75 – ...
Page 67
... Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM Input Slew Rate Derating ) at DDR2-533 REF ) REF 1.0 V/ns 0.8 V/ns 0.6 V/ ...
Page 68
... Nominal slew rate REF region IH(AC)min REF(DC and V IL(DC)max IH(DC)min REF region - V ) IH[AC]min REF[DC] TR and V IL(DC)max IH(DC)min Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved ...
Page 69
... TF and V IL(DC)max IH(DC)min Nominal line Tangent line REF region line TF Tangent line ( IH[DC]min REF[DC and V IL(DC)max IH(DC)min Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved ...
Page 70
... DQS Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM Input Slew Rate Derating V DDQ V IH(AC)min V IH(DC)min V REF(DC) V IL(DC)min V IL(AC)min V SSQ V DDQ ...
Page 71
... DDQ Crossing point Vswing SSQ 71 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM Input Slew Rate Derating V REF V DDQ V IH(AC)min V IH(DC)min V REF(DC) V IL(DC)max V IL(AC)max V SSQ ...
Page 72
... measurements. DD Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Commands A9–A0 Notes Column address 8 Column ...
Page 73
... DDR2 SDRAM Command/Action t RP has been met, and any READ burst is com- t RCD has been met. No data bursts/ Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Commands Notes 7 7 ...
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... RP has been met. After t MRD is met, the DDR2 SDRAM will be in the RP is met, all banks will be in the idle state. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Commands t ...
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... DDR2 SDRAM Command/Action t RP has been met, and any READ t RCD has been met. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Commands Notes ...
Page 76
... WTR is either two or WTR/ Minimum Delay (with Concurrent Auto Precharge (BL/2) + WTR (BL/2) 1 (BL/2) (BL/ Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Commands t CK, whichever Units ...
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... DDR2 SDRAM t MRD is met. t RCD (MIN) by delaying the actual registration of the READ/WRITE t RCD (MIN) by delaying the actual registration of the READ/WRITE 77 Micron Technology, Inc. reserves the right to change products or specifications without notice. Commands ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 78
... RP) after the PRECHARGE command is issued, except in the case of t MRD before initiating any subsequent operations such as an ACTIVATE com- 78 2Gb: x4, x8, x16 DDR2 SDRAM Mode Register (MR) Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 79
... Reserved 0 1 Reserved 1 0 Reserved 1 1 Reserved Burst Type Sequential Interleaved CAS Latency (CL) Reserved Reserved Reserved Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 80
... Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 81
... XARDS parameter is used for slow-exit active PD exit timing. The DLL can 81 2Gb: x4, x8, x16 DDR2 SDRAM Mode Register (MR) normal and I DD3P Specifications and Conditions table. DD Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved (in low- DD3P ...
Page 82
... NOP ( READ NOP NOP ( AC, DQSCK, and 82 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM Mode Register (MR) t RCD (MIN) by delaying the inter NOP NOP NOP ...
Page 83
... ODS DLL E0 DLL Enable 0 Enable (normal) 1 Disable (test/debug) E1 Output Drive Strength 0 Full 1 Reduced 3 Posted CAS# Additive Latency (AL Reserved Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 84
... DD PDF: 09005aef824f87b6 2Gb_DDR2.pdf – Rev DQSCK parameters. 84 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM Extended Mode Register (EMR) ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 85
... Off-Chip Driver (OCD) Impedance Calibration The OFF-CHIP DRIVER function is an optional DDR2 JEDEC feature not supported by Micron and thereby must be set to the default state. Enabling OCD beyond the default settings will alter the I/O drive characteristics and the timing and output I/O specifica- tions will no longer be valid (see Initialization (page 89) for proper setting of OCD de- faults) ...
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... DQSQ NOP NOP NOP Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. T8 NOP Don’t Care T7 NOP DI Don’t Care ...
Page 87
... DDR2 SDRAM Extended Mode Register 2 (EMR2) t MRD before initiating any subsequent opera Address bus Extended mode register (Ex Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 88
... DDR2 SDRAM Extended Mode Register 3 (EMR3) t MRD before initiating any subsequent opera Address bus Extended mode 1 0 register (Ex Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
Page 89
Initialization Figure 43: DDR2 Power-Up and Initialization DDR2 SDRAM must be powered up and initialized in a predefined manner. Operational procedures other than those specified may result in unde- fined operation. Figure 43 illustrates, and the notes outline, the sequence ...
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... EMR(3) requirements. mand, provide LOW to BA1 and A0; provide HIGH to BA0; bits E7, E8, and E9 can be set to “0” or “1;” Micron recommends setting them to “0;” remaining EMR bits must be “0.” Extended Mode Register (EMR) (page 83) for all EMR requirements. ...
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... DQS represents DQS, DQS#, UDQS, UDQS#, LDQS, LDQS#, RDQS, RDQS# for the ap- propriate configuration (x4, x8, x16); DQ represents DQ[3:0] for x4, DQ[7:0] for x8 and DQ[15:0] for x16. required to be decoded). 91 2Gb: x4, x8, x16 DDR2 SDRAM Initialization Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... CK 6. Figure 44 also shows the case for NOP NOP NOP NOP Row Bank z Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ACTIVATE T9 RD/WR Col Bank y Don’t Care t RC. t FAW ...
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... ACT READ NOP NOP Row Col Bank d Bank d t RRD (MIN) = 7.5ns, Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ACTIVATE T10 ACT Row Bank e Don’t Care ...
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... DQSQ (valid data-out skew), t DQSCK (DQS transition skew to CK) and t t DQSS (NOM) case is shown ( DQSS [MIN] and 94 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2Gb: x4, x8, x16 DDR2 SDRAM t RPRE). The t QH (data-out t DQSS [MAX] are de- ‹ ...
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... T3 T4 T4n NOP NOP T3n T4 T4n NOP NOP DO n Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ T5 NOP T5 T5n NOP T5 NOP Don’t Care ...
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... T5n T2n T3 T3n T4 T4n T5 NOP NOP NOP DO n Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ T6n T6 NOP T6n T6 NOP DO b Don’t Care ...
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... T4n T5 T5n NOP NOP NOP NOP DO n Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ T7n T8 NOP T7n T8 NOP DO b Don’t Care ...
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... Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ T9 Valid DO DO Don’t Care t DQSCK, and T10 T11 NOP NOP ...
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... NOP Bank a Valid •t RTP (MIN) •t RP (MIN) Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ T7 NOP T8 ACT Bank a Valid DO Don’t Care ...
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... RTP + RP)/ CK. In any event, the internal pre- Minimum Delay (with Concurrent Auto Precharge) BL/2 (BL/ Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ t RAS (MIN RP)/ CK. The Units ...
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... (MAX (MIN) Transitioning Data t RAS (MIN) is met RTP 2CK). Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ T8n T9 ACT RA RA Bank x t RPST (MIN) ...
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... LZ (MAX (MAX (MAX) Internal precharge Transitioning Data t RAS (MIN) and Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ T8n ACT RA RA Bank x t RPST (MIN) ...
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... T3n T2n T3 T3n Data Data Data valid valid valid window window window t DQSQ window. DQS transitions at t QHS. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ t QHS DQSQ. ...
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... T2n T3 T3n T2n T3 T3n T3 T3n T2n Data valid Data valid Data valid window window window t DQSQ window. LDQS defines the Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. READ t QHS ...
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... T3n T4 T4n T5 T5n (MIN (MAX (MAX) t DQSQ window. t AC. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE t DQSQ. T6n T7 t RPST T6n T6n T6n t DQSS. ...
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... WR starts at the end of the data burst, regardless Minimum Delay (with Concurrent Auto Precharge (BL/2) + WTR (BL/2) 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE t DQSS t WR must be Units t CK ...
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... DDR2 SDRAM T2 T2n T3 T3n T4 NOP NOP NOP DQSS DQSS Transitioning Data Don’t Care t DQSS. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE ...
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... T5n WRITE NOP NOP Bank, Col Transitioning Data t DQSS. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE T6 NOP Don’t Care T6 T6n NOP 1 Don’t Care ...
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... Transitioning Data t CK from previous WRITE. t DQSS. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE T9 Valid Don’t Care where ...
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... Bank a, Col Transitioning Data t DQSS WTR is either 2 or WTR/ Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE T9 T9n NOP Don’t Care t CK, whichever is ...
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... DDR2 SDRAM NOP NOP NOP t WR Transitioning Data t DQSS not required and Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE T7 PRE t RP Bank all) Don’t Care ...
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... RAS 5 t DQSL t DQSH t WPST t WPRE DI n Transitioning Data t DQSS. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE T9 PRE All banks One bank Bank Don’t Care ...
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... NOP RAS 5 t DQSL t DQSH t WPST DI n Transitioning Data t WR (in ns DQSS. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE T9 NOP Don’t Care t CK and ...
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... NOP RAS 6 t DQSL t DQSH t WPST DI n Transitioning Data t DQSS. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. WRITE T10 T11 NOP 1 PRE All banks One bank Bank RPA Don’ ...
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... T3n T4 t DSS 2 t DSH 1 t DSS DQSL t DQSH t WPST Transitioning Data Don’t Care t DQSS (MIN). t DQSS (MAX). t DQSS. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. PRECHARGE ...
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... Ta0 Ta1 Tb0 NOP 1 REF 2 NOP 1 t RFC 2 t RFC (MIN) Indicates a break in time scale Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. REFRESH exceeds C Tb1 Tb2 NOP 1 ACT Don’ ...
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... DDR2 SDRAM t CKE specifications at least 1 × t XSNR. A simple algorithm for meeting both refresh and DLL require- 117 Micron Technology, Inc. reserves the right to change products or specifications without notice. SELF REFRESH t CK after entering self re specifications at least 1 × ...
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... AOFD and AOFPD have been satisfied) prior to en- t CKE (MIN) must be satisfied prior to exiting self re- t XSRD is satisfied. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. SELF REFRESH Td0 W ,+ Valid 5 ...
Page 119
... CK, whichever is greater. t RFC (MAX). The minimum duration for power-down t CKE (MIN) parameter. The following must be main- 119 Micron Technology, Inc. reserves the right to change products or specifications without notice. Power-Down Mode t WTR (WRITE-to- t WTR ‹ 2006 Micron Technology, Inc. All rights reserved. ...
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... Valid XARD 4 t XARDS 5 Exit power-down mode × IH. CKE must not transition Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. T8 Valid Valid Don’t Care ...
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... Precharge power-down entry Self refresh entry ) in self refresh and power- REF t t CK. Minimum CKE LOW time is Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Notes 11, 12 ...
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... NOP 1 Valid Valid Power-down or self refresh 2 entry Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved CKE (MIN) Don’t Care T7 t CKE (MIN) Don’t Care ...
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... Power-down or self refresh entry Indicates a break in Transitioning Data time scale t WR [MIN] ns/ Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved CKE (MIN) Don’t Care Ta2 t CKE (MIN) Don’t Care ...
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... RFC (MIN) being satis NOP t CKE (MIN) Power-down 1 entry Don’t Care t CK after the ACTI- t RCD (MIN) being satisfied. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved after the ...
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... CKE (MIN) t MRD Power-down 3 entry t RP met prior to issuing LM command. t MRD is satisfied. Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved after the t RP (MIN) being sat- Don’t Care ...
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... CKE (MIN) 3 NOP NOP LM NOP DLL RESET t XP 200 Indicates a break in time scale Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Tb0 Valid Valid Don’t Care re- ...
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... DDR2 SDRAM t t CK. Minimum CKE LOW time DDQ Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Reset t CKE = 3 × CK and DDL t ...
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... NOP 2 High-Z High 400ns (MIN) Start of normal 5 initialization sequence R On Transitioning Data TT Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. Reset Tb0 PRE All banks High-Z t RPA Don’t Care ...
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... AXPD (MIN) after exiting pow AOND and t AXPD (MIN) is not t AXPD (MIN) is not satisfied, Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ODT Timing t ANPD t AXPD (MIN) is AON timing pa- ...
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... DDR2 SDRAM Synchronous t t AXPD (8 CKs) First CKE latched HIGH Any mode except self refresh mode t AOND/ Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ODT Timing t AOFD ...
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... Valid Valid Valid Valid Valid t AOFD t AOF (MAX) t AOF (MIN) R Unknown Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ODT Timing Ta5 NOP T6 Valid Valid Don’t Care ...
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... AOF (MAX) t AOF (MIN) t AOFPD (MAX) t AOFPD (MIN) R Unknown Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ODT Timing T7 Valid Valid Don’t Care T6 NOP Don’t Care ...
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... NOP NOP NOP t ANPD (MIN) t AOND t AON (MAX) t AON (MIN) t AONPD (MAX) t AONPD (MIN) R Unknown Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ODT Timing Don’t Care ...
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... NOP NOP NOP t AOFD t AOF (MAX) t AOF (MIN) t AOFPD (MAX) t AOFPD (MIN Transitioning Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ODT Timing Ta5 NOP Don’t Care ...
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... NOP NOP t AOND t AON (MAX) t AON (MIN) t AONPD (MAX) t AONPD (MIN) Unknown R On Transitioning R TT Micron Technology, Inc. reserves the right to change products or specifications without notice. ‹ 2006 Micron Technology, Inc. All rights reserved. ODT Timing Ta5 NOP Don’t Care TT ...