SY100S336FC Micrel Inc, SY100S336FC Datasheet

SY100S336FC

Manufacturer Part Number

SY100S336FC

Description

IC COUNTER/SHIFT REG 24-CERPACK

Manufacturer

Micrel Inc

Series

100Sr

Datasheet

1.SY100S336JC_TR.pdf (10 pages)

Specifications of SY100S336FC

Logic Type

Counter/Shift Register

Supply Voltage

4.2 V ~ 5.5 V

Number Of Bits

Operating Temperature

0°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

24-Cerpack

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

SY100S336FC

Manufacturer:

Quantity:

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Download datasheet (124Kb)

Micrel, Inc.

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

FEATURES

Max. shift frequency of 700MHz

Clock to Q delay max. of 1100ps

Internal 75K input pull-down resistors

Industry standard 100K ECL levels

Extended supply voltage option:

Voltage and temperature compensation for improved

noise immunity

50% faster than Fairchild 300K at lower power

Function and pinout compatible with Fairchild F100K

Available in 24-pin CERPACK and 28-pin PLCC

packages

min. of –170mA

= –4.2V to –5.5V

4-STAGE COUNTER/

SHIFT REGISTER

down counter or as a 4-bit bidirectional shift register and is

designed for use in high-performance ECL systems. Three

Select inputs (Sn) are provided for determining the mode of

operation. The Function Table lists the available modes of

operation. In order to allow cascading for multistage

counters, two Count Enable controls (CEP, CET) are

provided. The CET input also functions as the Serial Data

input (S

as the Serial Data input for the shift-down operation.

Count (TC) goes to a logical LOW when the count reaches

15 for count-up or reaches 0 for count-down. When in the

shift mode, the TC output simply repeats the Q

CET input allows these signals to be interconnected from

one stage to the next higher stage for multistage counting

or shift-up operations. The individual Presets (P

initialization of the counter by entering data in parallel to

preset the counter. A logic HIGH on the Master Reset (MR)

overrides all other inputs and asynchronously clears the

flip-flops. An additional synchronous Clear is provided, as

well as a complement function which synchronously inverts

the contents of the flip-flops. All inputs have 75K

down resistors.

DESCRIPTION

PIN NAMES

CEP

The SY100S336 functions either as a modulo-16 up/

When the device is in the counting mode, the Terminal

The flexiblity provided by the TC/Q

EES

CCA

/CET

— S

– P

— Q

) for a shift-up operation, while the D

Serial Data Input

Terminal Count Output

Data Outputs

Complementary Data Outputs

Clock Pulse Input

Count Enable Parallel Input (Active LOW)

Serial Data Input/Count Enable Trickle

Input (Active LOW)

Select Inputs

Master Reset Input

Preset Inputs

CCO

Substrate

for ECL Outputs

Function

output and the D

Rev.: H

Issue Date: March 2006

SY100S336

input serves

SY100S336

Amendment: /0

output.

) allow

pull-

Related parts for SY100S336FC

SY100S336FC Summary of contents

Page 1

Micrel, Inc. FEATURES Max. shift frequency of 700MHz Clock to Q delay max. of 1100ps I min. of –170mA EE Internal 75K input pull-down resistors Industry standard 100K ECL levels Extended supply voltage option –4.2V to –5.5V EE ...

Page 2

... Notes: 1. Tape and Reel. 2. Pb-Free package is recommended for new designs Operating Package Range Marking Commercial SY100S336FC Commercial SY100S336FC Commercial SY100S336JC Commercial SY100S336JC Commercial SY100S336JZ with Pb-Free bar-line indicator Commercial SY100S336JZ with Pb-Free bar-line indicator SY100S336 Lead Finish Sn-Pb Sn-Pb Sn-Pb Sn-Pb ...

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SY100S336FC Micrel Inc, SY100S336FC Datasheet

SY100S336FC

Specifications of SY100S336FC

Available stocks

Related parts for SY100S336FC

SY100S336FC Summary of contents

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