MAX1296BEEG Maxim Integrated, MAX1296BEEG Datasheet - Page 14

• Manufacturer Part Number: MAX1296BEEG
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1296BEEG

• Number Of Channels: 2/1
• Architecture: SAR
• Conversion Rate: 420 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: Yes
• Interface Type: Parallel
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QSOP-24
• Maximum Power Dissipation: 762 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: Internal 2.5 V or External

The control bit sequence is latched into the device on
pins D7–D0 during a write command. Table 4 shows
the control-byte format.
The 12-bit-wide output format for both the MAX1294/
MAX1296 is binary in unipolar mode and two’s comple-
ment in bipolar mode. CS, RD, WR, INT, and the 12 bits
of output data can interface directly to a 16-bit data bus.
When reading the output data, CS and RD must be low.
When power is first applied, internal power-on reset cir-
cuitry activates the MAX1294/MAX1296 in external clock
mode and sets INT high. After the power supplies stabi-
lize, the internal reset time is 10µs; no conversions
should be attempted during this phase. When using the
internal reference, 500µs is required for V
The MAX1294/MAX1296 can be used with an internal
or external reference voltage. An external reference
can be connected directly to REF or REFADJ.
An internal buffer is designed to provide +2.5V at REF for
both devices. The internally trimmed +1.22V reference is
buffered with a +2.05V/V gain.
The full-scale range with the internal reference is +2.5V
with unipolar inputs and ±1.25V with bipolar inputs. The
internal reference buffer allows for small adjustments
(±100mV) in the reference voltage (Figure 7).
Note: The reference buffer must be compensated with
an external capacitor (4.7µF min) connected between
REF and GND to reduce reference noise and switching
spikes from the ADC. To further minimize reference
noise, connect a 0.01µF capacitor between REFADJ
and GND.
With the MAX1294/MAX1296, an external reference can
be placed at either the input (REFADJ) or the output
(REF) of the internal-reference buffer amplifier.
420ksps, +5V, 6-/2-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
Table 4. Control-Byte Format
14
(MSB)
______________________________________________________________________________________
PD1
D7
Internal and External Reference
Applications Information
PD0
D6
ACQMOD
Output Data Format
Power-On Reset
D5
External Reference
Internal Reference
REF
Input Format
to stabilize.
SGL/DIF
D4
Using the REFADJ input makes buffering the external
reference unnecessary. The REFADJ input impedance
is typically 17kΩ.
When applying an external reference to REF, disable the
internal reference buffer by connecting REFADJ to V
The DC input resistance at REF is 25kΩ. Therefore, an
external reference at REF must deliver up to 200µA DC
load current during a conversion and have an output
impedance less than 10Ω. If the reference has higher
output impedance or is noisy, bypass it close to the REF
pin with a 4.7µF capacitor.
To save power, place the converter in a low-current
shutdown state between conversions. Select standby
mode or shutdown mode using bits D6 and D7 of the
control byte (Tables 1 and 4). In both software power-
down modes, the parallel interface remains active, but
the ADC does not convert.
While in standby mode, the supply current is typically
1mA. The part powers up on the next rising edge of WR
and is ready to perform conversions. This quick turn-on
time allows the user to realize significantly reduced
power consumption for conversion rates below
420ksps.
Figure 7. Reference Adjustment with External Potentiometer
UNI/BIP
D3
50kΩ
50kΩ
V
DD
= +5V
330kΩ
D2
A2
0.01µF
Power-Down Modes
4.7µF
D1
A1
REFADJ
REF
Standby Mode
MAX1294
MAX1296
(LSB)
D0
A0
DD
.