MAX1028BEEP Maxim Integrated, MAX1028BEEP Datasheet
MAX1028BEEP
Specifications of MAX1028BEEP
Available stocks
Related parts for MAX1028BEEP
MAX1028BEEP Summary of contents
Page 1
... Low-Power Single +5V Operation 2.3mA at 300ksps o Internal 4.096V Reference or External Differential Reference o 10MHz 3-Wire SPI/QSPI/MICROWIRE-Compatible Interface o Space-Saving 28-Pin 5mm x 5mm TQFN Package PART MAX1026BCEE+T MAX1026BEEE+T MAX1028BCEP+T MAX1028BEEP+T + Denotes a lead(Pb)-free/RoHS-compliant package Tape and reel. Ordering Information continued at end of data sheet. 16 EOC 15 DOUT 14 DIN 13 ...
Page 2
ADCs with FIFO, Temp Sensor, Internal Reference ABSOLUTE MAXIMUM RATINGS V to GND ..............................................................-0.3V to +6V DD CS, SCLK, DIN, EOC, DOUT to GND.........-0. AIN0–AIN13, REF-/AIN_, CNVST/AIN_, REF+ to GND.........................................-0. Maximum Current into Any ...
Page 3
ELECTRICAL CHARACTERISTICS (continued +5V ±5 300kHz SAMPLE SCLK Typical values are +25°C.) A PARAMETER SYMBOL CONVERSION RATE Power-Up Time Acquisition Time Conversion Time t External Clock Frequency f Aperture Delay Aperture ...
Page 4
ADCs with FIFO, Temp Sensor, Internal Reference ELECTRICAL CHARACTERISTICS (continued +5V ±5 300kHz SAMPLE SCLK Typical values are +25°C.) A PARAMETER SYMBOL DIGITAL INPUTS (SCLK, DIN, CS, CNVST)(Note 8) ...
Page 5
TIMING CHARACTERISTICS (Figure 1) PARAMETER SYMBOL SCLK Clock Period SCLK Duty Cycle SCLK Fall to DOUT Transition CS Rise to DOUT Disable CS Fall to DOUT Enable DIN to SCLK Rise Setup SCLK Rise to DIN Hold C S Fal ...
Page 6
ADCs with FIFO, Temp Sensor, Internal Reference (V = +5V +4.096V 4.8MHz REF SCLK SFDR vs. FREQUENCY 120 100 0 100 1000 FREQUENCY (kHz) SHUTDOWN ...
Page 7
V = +4.096V 4.8MHz REF SCLK INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE 4.051 4.050 4.049 4.048 4.047 -40 - TEMPERATURE (°C) GAIN ERROR vs. SUPPLY VOLTAGE 0.5 0 -0.5 -1.0 4.75 ...
Page 8
ADCs with FIFO, Temp Sensor, Internal Reference PIN MAX1030 MAX1030 MAX1028 MAX1026 TQFN QSOP 1, 17, 19, — — 25 2–12, 26, 1–14 — 27, 28 — — 1–10 — — — — — — 11 ...
Page 9
CS t CSS SCLK DIN t DOE DOUT Figure 1. Detailed Serial-Interface Timing Diagram CS DIN SCLK CNVST AIN1 AIN2 AIN15 REF- REF+ Figure 2. Functional Diagram Detailed Description The MAX1026/MAX1028/MAX1030 are low-power, seri- al-output, multichannel ...
Page 10
ADCs with FIFO, Temp Sensor, Internal Reference Converter Operation The MAX1026/MAX1028/MAX1030 ADCs use a fully dif- ferential, successive-approximation register (SAR) con- version technique and an on-chip T/H block to convert temperature and voltage signals into a 10-bit digital ...
Page 11
REF AIN0-AIN15 DAC GND (SINGLE ENDED); AIN0, AIN2, AIN4…AIN14 CIN+ (DIFFERENTIAL) HOLD GND CIN- (SINGLE ENDED); AIN1, AIN3, AIN5…AIN15 HOLD (DIFFERENTIAL Figure 3. Equivalent Input Circuit Address the unipolar and bipolar registers through the setup register (bits ...
Page 12
ADCs with FIFO, Temp Sensor, Internal Reference Applications Information Register Descriptions The MAX1026/MAX1028/MAX1030 communicate between the internal registers and the external circuitry through the SPI/QSPI-compatible serial interface. Table 1 details the registers and the bit names. Tables 2–7 ...
Page 13
Table 2. Conversion Register* BIT BIT FUNCTION NAME — 7 (MSB) Set select conversion register. CHSEL3 6 Analog input channel select. CHSEL2 5 Analog input channel select. CHSEL1 4 Analog input channel select. CHSEL0 3 Analog input ...
Page 14
ADCs with FIFO, Temp Sensor, Internal Reference Table 3. Setup Register* BIT NAME BIT — 7 (MSB) Set to zero to select setup register. — 6 Set select setup register. Clock mode and CNVST configuration. ...
Page 15
Power-Up Default State The MAX1026/MAX1028/MAX1030 power up with all blocks in shutdown, including the reference. All registers power up in state 00000000, except for the setup regis- ter, which powers up in clock mode 10 (CKSEL1 = 1). Temperature Measurements ...
Page 16
ADCs with FIFO, Temp Sensor, Internal Reference Table 6. Averaging Register* BIT NAME BIT — 7 (MSB) Set to zero to select averaging register. — 6 Set to zero to select averaging register. — 5 Set to 1 ...
Page 17
Internally Timed Acquisitions and Conversions Using CNVST Performing Conversions in Clock Mode 00 In clock mode 00, the wake up, acquisition, conversion, and shutdown sequences are initiated through CNVST and performed automatically using the internal oscilla- tor. Results are added ...
Page 18
ADCs with FIFO, Temp Sensor, Internal Reference CNVST (ACQUISITION1) (ACQUISITION2) CS (CONVERSION1) SCLK DOUT EOC REQUEST MULTIPLE CONVERSIONS BY SETTING CNVST LOW FOR EACH CONVERSION DON'T CARE. Figure 5. Clock Mode 01 (CONVERSION BYTE) DIN CS ...
Page 19
DIN (ACQUISITION1) CS SCLK DOUT EOC EXTERNALLY TIMED ACQUISITION, SAMPLING AND CONVERSION WITHOUT CNVST DON'T CARE. Figure 7. Clock Mode 11 Externally Clocked Acquisitions and Conversions Using the Serial Interface Performing Conversions in Clock Mode 11 In clock ...
Page 20
ADCs with FIFO, Temp Sensor, Internal Reference OUTPUT CODE FULL-SCALE TRANSITION 111 110 101 011 010 00 . ...
Page 21
TOP VIEW + AIN0 1 AIN1 2 AIN2 3 AIN3 4 MAX1030 AIN4 5 AIN5 6 AIN6 7 AIN7 8 AIN8 9 AIN9 10 AIN10 11 AIN11 12 QSOP Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of ...
Page 22
... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2011 Maxim Integrated Products DESCRIPTION Maxim is a registered trademark of Maxim Integrated Products, Inc ...