MAX1028BEEP Maxim Integrated, MAX1028BEEP Datasheet - Page 13

• Manufacturer Part Number: MAX1028BEEP
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1028BEEP

• Number Of Channels: 12/6
• Architecture: SAR
• Conversion Rate: 300 KSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Differential
• Snr: Yes
• Interface Type: 3-Wire (SPI, Microwire), QSPI
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QSOP-20
• Maximum Power Dissipation: 727 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: Internal 4.096 V or External

Table 2. Conversion Register*
* See below for bit details.
CHSEL3
CHSEL2
CHSEL1
CHSEL0
SCAN1 SCAN0
SCAN1
SCAN0
CHSEL3
NAME
TEMP
BIT
—
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
7 (MSB) Set to 1 to select conversion register.
0 (LSB)
BIT
CHSEL2
0
1
0
1
6
5
4
3
2
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Scans channels 0 through N.
Scans channels N through the highest
numbered channel.
S cans channel N r ep eated l y. The aver ag i ng
r eg i ster sets the num b er of r esul ts.
No scan. Converts channel N once only.
Analog input channel select.
Analog input channel select.
Analog input channel select.
Analog input channel select.
Scan mode select.
Scan mode select.
Set to 1 to take a single temperature
measurement. The first conversion result
of a scan contains temperature information.
______________________________________________________________________________________
SELECTED BY BITS CHSEL3–CHSEL0)
CHSEL1
SCAN MODE (CHANNEL N IS
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
CHSEL0
FUNCTION
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Temp Sensor, Internal Reference
10-Bit 300ksps ADCs with FIFO,
CHANNEL (N)
SELECTED
AIN10
AIN11
AIN12
AIN13
AIN14
AIN15
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
Write a byte to the setup register to configure the clock,
reference, and power-down modes. Table 3 details the
bits in the setup register. Bits 5 and 4 (CKSEL1 and
CKSEL0) control the clock mode, acquisition and sam-
pling, and the conversion start. Bits 3 and 2 (REFSEL1
and REFSEL0) control internal or external reference use.
Bits 1 and 0 (DIFFSEL1 and DIFFSEL0) address the
unipolar mode and bipolar mode registers and configure
the analog input channels for differential operation.
The final 2 bits (LSBs) of the setup register control the
unipolar/bipolar mode address registers. Set bits 1 and
0 (DIFFSEL1 and DIFFSEL0) to 10 to write to the unipo-
lar mode register. Set bits 1 and 0 to 11 to write to the
bipolar mode register. In both cases, the setup byte
must be followed immediately by 1 byte of data written
to the unipolar register or bipolar register. Hold CS low
and run 16 SCLK cycles before pulling CS high. If the
last 2 bits of the setup register are 00 or 01, neither the
unipolar mode register nor the bipolar mode register is
written. Any subsequent byte is recognized as a new
input data byte. See Tables 4 and 5 to program the
unipolar and bipolar mode registers.
If a channel is configured as both unipolar and bipolar,
the unipolar setting takes precedence. In unipolar
mode, AIN+ can exceed AIN- by up to V
put format in unipolar mode is binary. In bipolar mode,
either input can exceed the other by up to V
output format in bipolar mode is two's complement.
Write to the averaging register to configure the ADC to
average up to 32 samples for each requested result,
and to independently control the number of results
requested for single-channel scans.
Table 2 details the four scan modes available in the con-
version register. All four scan modes allow averaging as
long as the AVGON bit, bit 4 in the averaging register, is
set to 1. Select scan mode 10 to scan the same channel
multiple times. Clock mode 11 disables averaging.
Write to the reset register (as shown in Table 7) to clear
the FIFO or to reset all registers to their default states.
Set the RESET bit to 1 to reset the FIFO. Set the reset
bit to zero to return the MAX1026/MAX1028/MAX1030
to the default power-up state.
Unipolar/Bipolar Registers
Averaging Register
Setup Register
Reset Register
REF
REF
. The out-
/ 2. The
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