MAX128AEAI Maxim Integrated, MAX128AEAI Datasheet - Page 6

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MAX128AEAI

Manufacturer Part Number
MAX128AEAI
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX128AEAI

Number Of Channels
8
Architecture
SAR
Conversion Rate
8 KSPs
Resolution
12 bit
Input Type
Single-Ended
Snr
Yes
Interface Type
I2C, Serial
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Package / Case
SSOP-28
Maximum Power Dissipation
762 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX128AEAI
Manufacturer:
MAXIM/美信
Quantity:
20 000
TIMING CHARACTERISTICS (continued)
(V
unless otherwise noted. Typical values are at T
Multirange, +5V, 12-Bit DAS with
2-Wire Serial Interface
6
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
2-WIRE STANDARD MODE
SCL Clock Frequency
Bus Free Time Between a STOP
and START Condition
Hold Time (Repeated) START
Condition
Low Period of the SCL Clock
High Period of the SCL Clock
Setup Time for a Repeated
START Condition
Data Hold Time
Data Setup Time
Rise Time for Both SDA and SCL
Signals (Receiving)
Fall Time for Both SDA and SCL
Signals (Receiving)
Fall Time for Both SDA and SCL
Signals (Transmitting)
Setup Time for STOP Condition
Capacitive Load for Each
Bus Line
Pulse Width of Spike Suppressed
DD
_______________________________________________________________________________________
= +4.75V to +5.25V; unipolar/bipolar range; external reference mode, V
PARAMETERS
Accuracy specifications tested at V
Supply Rejection test.
External reference: V
Ground “on” channel, sine wave applied to all “off” channels.
Guaranteed by design. Not tested.
Use static external load during conversion for specified accuracy.
Tested using internal reference.
PSRR measured at full scale. Tested for the ±10V (MAX127) and ±4.096V (MAX128) input ranges.
Not subject to production testing. Provided for design guidance only.
REF
= 4.096V, offset error nulled, ideal last-code transition = FS - 3/2LSB.
SYMBOL
t
t
t
t
t
HD, DAT
SU, DAT
SU, STO
SU, STA
HD,STA
t
t
f
t
HIGH
LOW
BUF
SCL
C
t
t
t
t
SP
R
F
F
b
DD
A
C
up to 6mA sink
= +25°C.)
= 5.0V. Performance at power-supply tolerance limits is guaranteed by Power-
b
= total capacitance of one bus line in pF,
CONDITIONS
REF
= 4.096V; 4.7µF at REF pin; T
0.1 x C
20 +
250
MIN
4.7
4.0
4.7
4.0
4.7
4.0
0
0
b
TYP
A
MAX
= T
1000
100
300
250
400
0.9
50
MIN
to T
UNITS
kHz
pF
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
µs
ns
MAX;

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