MAX1362EUB-T Maxim Integrated, MAX1362EUB-T Datasheet - Page 16

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MAX1362EUB-T

Manufacturer Part Number
MAX1362EUB-T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1362EUB-T

Number Of Channels
4/2
Architecture
SAR
Conversion Rate
150 KSPs
Resolution
10 bit
Input Type
Single-Ended/Differential
Snr
Yes
Interface Type
I2C, Serial
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
uMAX
Maximum Power Dissipation
689.7 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V
4-Channel, 10-Bit, System Monitor with Programmable
Trip Window and SMBus Alert Response
Table 4. Setup-Byte Format*
* Power-on defaults: 0x82
Table 5. Channel Selection in Single-
Ended Mode (SE/DIF = 1)
Table 6. Channel Selection in Differential
Mode (SE/DIF = 0)
16
7 (MSB)
CS1
CS1
BIT
0
0
1
1
0
0
1
1
6
5
4
3
2
1
0
______________________________________________________________________________________
INT REF Power
REF/AIN SEL1
REF/AIN SEL0
Monitor Setup
CS0
CS0
0
1
0
1
0
1
0
1
/EXT Clock
NAME
Setup
Reset
Down
/BIP
CH0
CH0
+
+
-
Setup byte always starts with 1.
When [0,0], REF/AIN3 = AIN3, REF = V
When [0,1], REF/AIN3 = REF, REF = external reference.
When [1,0], REF/AIN3 = AIN3, REF = internal reference.
When [1,1], REF/AIN3 = REF, REF = internal reference.
(Table 3)
1 = internal reference always powered up.
0 = internal reference always powered down.
(Table 3)
0 = internal clock.
1 = external clock (MAX1361/MAX1362 use the SCL clock for conversions).
0 = unipolar.
1 = bipolar.
Selects unipolar or bipolar conversion mode. In unipolar mode, analog signal in 0 to V
can be converted. In differential bipolar mode, input signal can range from -V
When single-ended mode is chosen, the SE/
conversions are performed in unipolar mode.
1 = no action.
0 = resets
0 = no action.
1 = extends writing up to 13 bytes (104 bits) of alarm reset mask. Scans speed selection and
alarm thresholds. See the Configuring Monitor Mode section.
CH1
CH1
+
+
-
and configuration register. Setup register and channel trip thresholds are unaffected.
CH2
CH2
+
+
-
CH3
CH3
+
+
-
Initiate a read cycle to start a conversion sequence and
to obtain conversion results. See the Scan Modes
section for details on the channel-scan sequence. Read
cycles begin with the bus master issuing a START
condition followed by 7 address bits and a read bit
(R/W = 1). After successfully receiving the address byte,
the MAX1361/MAX1362 (slave) issue an ACK. The master
then reads from the slave. (See Figures 10–13.)
The result is transmitted in 2 bytes. The 1st byte con-
sists of a leading 1 followed by a 2-bit binary channel
address tag, a 12/10 bit flag (0 for the MAX1361/
MAX1362), 2 bits of 1s, the first 2 bits of the data result,
and the expected ACK from the master. The 2nd byte
Table 7. SE/DIF and UNI/BIP Table
DD.
DESCRIPTION
SE/DIF
0
0
1
1
bit of configuration byte overrides
Reading a Conversion (Read Cycle)
UNI/BIP
0
1
0
1
Differential inputs, unipolar
Differential inputs, bipolar
Single-ended inputs, unipolar
Single-ended inputs, unipolar
REF
/2 to +V
MODE
REF
/BIP, and
REF
range
/2.

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