MAX146ACPP Maxim Integrated, MAX146ACPP Datasheet - Page 21

• Manufacturer Part Number: MAX146ACPP
• Description: Analog to Digital Converters - ADC Integrated Circuits (ICs)
• Manufacturer: Maxim Integrated

Specifications of MAX146ACPP

• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 133 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Differential
• Snr: Yes
• Interface Type: 4-Wire (SPI, Microwire, QSPI, TMS320)
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Package / Case: PDIP N
• Maximum Power Dissipation: 889 mW
• Minimum Operating Temperature: 0 C
• Number Of Converters: 1
• Factory Pack Quantity: 18
• Voltage Reference: Internal 2.5 V or External

Figure 21 shows an application circuit to interface the
MAX146/MAX147 to the TMS320 in external clock mode.
The timing diagram for this interface circuit is shown in
Figure 22.
Use the following steps to initiate a conversion in the
MAX146/MAX147 and to read the results:
1) The TMS320 should be configured with CLKX
2) The MAX146/MAX147’s CS pin is driven low by the
3) An 8-bit word (1XXXXX11) should be written to the
Figure 18. Bipolar Transfer Function, Full Scale (FS) =
VREF / 2 + COM, Zero Scale (ZS) = COM
*COM
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
100 . . . 001
100 . . . 000
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
tied together with the MAX146/MAX147’s SCLK
input.
TMS320’s XF_ I/O port to enable data to be clocked
into the MAX146/MAX147’s DIN.
MAX146/MAX147 to initiate a conversion and place
the device into external clock mode. Refer to Table
1 to select the proper XXXXX bit values for your
specific application.
≤
VREF / 2
OUTPUT CODE
-FS =
1LSB =
- FS
FS = VREF
ZS = COM
-VREF
2
2
______________________________________________________________________________________
VREF
4096
+ COM
+ COM
INPUT VOLTAGE (LSB)
TMS320LC3x Interface
COM*
+FS - 1LSB
+2.7V, Low-Power, 8-Channel,
4) The MAX146/MAX147’s SSTRB output is monitored
5) The TMS320 reads in one data bit on each of the
6) Pull CS high to disable the MAX146/MAX147 until
Figure 19. Power-Supply Grounding Connection
R* = 10Ω
via the TMS320’s FSR input. A falling edge on the
SSTRB output indicates that the conversion is in
progress and data is ready to be received from the
MAX146/MAX147.
next 16 rising edges of SCLK. These data bits rep-
resent the 12-bit conversion result followed by four
trailing bits, which should be ignored.
the next conversion is initiated.
*OPTIONAL
V
+3V
DD
Serial 12-Bit ADCs
AGND
MAX146
MAX147
SUPPLIES
COM
DGND
+3V
+3V
CIRCUITRY
DIGITAL
DGND
GND
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