MAX1033BEUP/GG8 Maxim Integrated, MAX1033BEUP/GG8 Datasheet - Page 28

• Manufacturer Part Number: MAX1033BEUP/GG8
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1033BEUP/GG8

• Number Of Channels: 4/2
• Architecture: SAR
• Conversion Rate: 115 KSPs
• Resolution: 14 bit
• Input Type: Single-Ended/Differential
• Snr: 85 dB
• Interface Type: SPI
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Power Dissipation: 879 mW
• Number Of Converters: 1
• Voltage Reference: 4.096 V

8- and 4-Channel, ±3 x V
Multirange Inputs, Serial 14-Bit ADCs
When a zero-scale analog input voltage is applied to
the converter inputs, the digital output is all ones
(0x3FFF). Ideally, the transition from 0x3FFF to 0x3FFE
occurs at AGND1 - 0.5 LSB. Unipolar offset error is the
amount of deviation between the measured zero-scale
transition point and the ideal zero-scale transition point,
with all untested channels grounded.
When a zero-scale analog input voltage is applied to
the converter inputs, the digital output is all zeros
(0x0000). Ideally, the transition from 0x0000 to 0x0001
occurs at AGND1 + 0.5 LSB. Unipolar offset error is the
amount of deviation between the measured zero-scale
transition point and the ideal zero-scale transition point,
with all untested channels grounded.
When a zero-scale analog input voltage is applied to
the converter inputs, the digital output is a one followed
by all zeros (0x2000). Ideally, the transition from
0x1FFF to 0x2000 occurs at (2
set error is the amount of deviation between the mea-
sured midscale transition point and the ideal midscale
transition point, with untested channels grounded.
When a positive full-scale voltage is applied to the con-
verter inputs, the digital output is all ones (0x3FFF). The
transition from 0x3FFE to 0x3FFF occurs at 1.5 LSB
below full scale. Gain error is the amount of deviation
between the measured full-scale transition point and
the ideal full-scale transition point with the offset error
removed and all untested channels grounded.
Unipolar endpoint overlap is the change in offset when
switching between complementary input voltage
ranges. For example, the difference between the volt-
age that results in a 0x3FFF output in the -3 x V
0V input voltage range and the voltage that results in a
0x0000 output in the 0 to +3 x V
range is the unipolar endpoint overlap. The unipolar
endpoint overlap is positive for the MAX1032/MAX1033,
preventing loss of signal or a dead zone when switch-
ing between adjacent analog input voltage ranges.
A 100mV
input frequency is then swept up to the point where the
amplitude of the digitized conversion result has
decreased by -3dB.
28
______________________________________________________________________________________
P-P
sine wave is applied to the ADC, and the
Unipolar Endpoint Overlap
Unipolar Offset Error
Small-Signal Bandwidth
Bipolar Offset Error
N-1
- 0.5)LSB. Bipolar off-
REF
/2 input voltage
0V to +FSR
-FSR to 0V
Gain Error
REF
/2 to
REF
A 95% of full-scale sine wave is applied to the ADC,
and the input frequency is then swept up to the point
where the amplitude of the digitized conversion result
has decreased by -3dB.
CMRR is the ability of a device to reject a signal that is
“common” to or applied to both input terminals. The
common-mode signal can be either an AC or a DC sig-
nal or a combination of the two. CMR is expressed in
decibels. Common-mode rejection ratio is the ratio of
the differential signal gain to the common-mode signal
gain. CMRR applies only to differential operation.
PSRR is the ratio of the output-voltage shift to the
power-supply-voltage shift for a fixed input voltage. For
the MAX1032/MAX1033, AVDD1 can vary from 4.75V to
5.25V. PSRR is expressed in decibels and is calculated
using the following equation:
For the MAX1032/MAX1033, PSRR is tested in bipolar
operation with the analog inputs grounded.
Aperture jitter, t
variation in the sampling instant (Figure 21).
Aperture delay, t
SCLK to the sampling instant (Figure 21).
SNR is computed by taking the ratio of the RMS signal
to the RMS noise. RMS noise includes all spectral com-
ponents to the Nyquist frequency excluding the funda-
mental, the first five harmonics, and the DC offset.
SINAD is computed by taking the ratio of the RMS sig-
nal to the RMS noise plus distortion. RMS noise plus
distortion includes all spectral components to the
Nyquist frequency excluding the fundamental and the
DC offset.
PSRR dB
Signal-to-Noise Plus Distortion (SINAD)
[
]
SINAD dB
=
Common-Mode Rejection Ratio (CMRR)
20
Power-Supply Rejection Ratio (PSRR)
(
AJ
AD
×
, is the statistical distribution of the
, is the time from the falling edge of
)
log
Signal-to-Noise Ratio (SNR)
=
⎛
⎜
⎝
V
20
OUT
×
( .
5 25
5 25
log
.
Full-Power Bandwidth
⎛
⎜
⎝
V
V
Signal
Noise
)
Aperture Delay
Aperture Jitter
−
−
4 75
V
RMS
OUT
.
RMS
V
( .
4 75
⎞
⎟
⎠
V
)
⎞
⎟
⎠