MAX148BMJP Maxim Integrated, MAX148BMJP Datasheet - Page 21

• Manufacturer Part Number: MAX148BMJP
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX148BMJP

• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 133 KSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Differential
• Snr: Yes
• Interface Type: 4-Wire, Microwire, QSPI, Serial, SPI
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 125 C
• Package / Case: CDIP N
• Maximum Power Dissipation: 640 mW
• Minimum Operating Temperature: - 55 C
• Number Of Converters: 1
• Voltage Reference: External

The MAX148/MAX149 can interface with QSPI using the
circuit in Figure 20 (f
0). This QSPI circuit can be programmed to do a conver-
sion on each of the eight channels. The result is stored
in memory without taxing the CPU, since QSPI incorpo-
rates its own microsequencer.
The MAX148/MAX149 are QSPI compatible up to the
maximum external clock frequency of 2MHz.
Figure 21 shows an application circuit to interface the
MAX148/MAX149 to the TMS320 in external clock mode.
The timing diagram for this interface circuit is shown in
Figure 22.
Use the following steps to initiate a conversion in the
MAX148/MAX149 and to read the results:
Figure 22. TMS320 Serial-Interface Timing Diagram
1) The TMS320 should be configured with CLKX (trans-
High-Speed Digital Interfacing with QSPI
mit clock) as an active-high output clock and CLKR
(TMS320 receive clock) as an active-high input
clock. CLKX and CLKR on the TMS320 are tied
together with the MAX148/MAX149’s SCLK input.
SSTRB
DOUT
SCLK
DIN
CS
START
+2.7V to +5.25V, Low-Power, 8-Channel,
SCLK
SEL2
= 2.0MHz, CPOL = 0, CPHA =
TMS320LC3x Interface
SEL1
SEL0
UNI/BIP
SGL/DIF
PD1
2) The MAX148/MAX149’s CS pin is driven low by the
3) An 8-bit word (1XXXXX11) should be written to the
4) The MAX148/MAX149’s SSTRB output is monitored
5) The TMS320 reads in one data bit on each of the
6) Pull CS high to disable the MAX148/MAX149 until
PD0
TMS320’s XF_ I/O port to enable data to be clocked
into the MAX148/MAX149’s DIN.
MAX148/MAX149 to initiate a conversion and place
the device into external clock mode. See Table 1 to
select the proper XXXXX bit values for your specific
application.
through the TMS320’s FSR input. A falling edge on
the SSTRB output indicates that the conversion is in
progress and data is ready to be received from the
MAX148/MAX149.
next 16 rising edges of SCLK. These data bits rep-
resent the 10 + 2-bit conversion result followed by 4
trailing bits, which should be ignored.
the next conversion is initiated.
Serial 10-Bit ADCs
MSB
B8
S1
S0
HIGH
IMPEDANCE
HIGH
IMPEDANCE
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